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| author | Wolfgang Denk <wd@denx.de> | 2008-04-11 15:11:26 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-04-11 15:11:26 +0200 |
| commit | 950a392464e616b4590bc4501be46e2d7d162dea (patch) | |
| tree | e33be5df8d39072af358f9e1febad383714cccc7 /include/configs/davinci_sonata.h | |
| parent | aeff6d503b6006573d5c6b04fc658a64bebee5fa (diff) | |
| download | talos-obmc-uboot-950a392464e616b4590bc4501be46e2d7d162dea.tar.gz talos-obmc-uboot-950a392464e616b4590bc4501be46e2d7d162dea.zip | |
Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:
Reverting became necessary after it turned out that the patches in
the u-boot-arm repo were modified, and in some cases corrupted.
This reverts the following commits:
066bebd6353e33af3adefc3404560871699e9961
7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6
c88ae20580b2b01487b4cdcc8b2a113f551aee36
a147e56f03871bba4f05058d5e04ce7deb010b04
d6674e0e2a6a1f033945f78838566210d3f28c95
8c8463cce44d849e37744749b32d38e1dfb12e50
c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d
8bf69d81782619187933a605f1a95ee1d069478d
8c16cb0d3b971f46fbe77c072664c0f2dcd4471d
a574a73852a527779234e73e17e7597fd8128882
1377b5583a48021d983e1fd565f7d40c89e84d63
1704dc20917b4f71e373e2c888497ee666d40380
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/configs/davinci_sonata.h')
| -rw-r--r-- | include/configs/davinci_sonata.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h index b2c0d7d175..de8c4fac2b 100644 --- a/include/configs/davinci_sonata.h +++ b/include/configs/davinci_sonata.h @@ -60,24 +60,6 @@ #define CFG_TIMERBASE 0x01c21400 /* use timer 0 */ #define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */ #define CFG_HZ 1000 -#define CFG_DAVINCI_PINMUX_0 0x00000c1f -#define CFG_DAVINCI_WAITCFG 0x00000000 -#define CFG_DAVINCI_ACFG2 0x3ffffffd /* CE configs */ -#define CFG_DAVINCI_ACFG3 0x3ffffffd -#define CFG_DAVINCI_ACFG4 0x3ffffffd -#define CFG_DAVINCI_ACFG5 0x3ffffffd -#undef CFG_DAVINCI_NANDCE /* When using NAND, define 2,3 or 4 */ -#define CFG_DAVINCI_DDRCTL 0x50006405 /* DDR timing config */ -#define CFG_DAVINCI_SDREF 0x000005c3 -#define CFG_DAVINCI_SDCFG 0x00178632 /* 8 banks */ -#define CFG_DAVINCI_SDTIM0 0x28923211 -#define CFG_DAVINCI_SDTIM1 0x0016c722 -#define CFG_DAVINCI_MMARG_BRF0 0x00444400 -/* DM6446 = 0x15, DM6441 = 0x12, DM6441_LV = 0x0e */ -#define CFG_DAVINCI_PLL1_PLLM 0x15 -#define CFG_DAVINCI_PLL2_PLLM 0x17 /* 162 MHz */ -#define CFG_DAVINCI_PLL2_DIV1 0x0b /* 54 MHz */ -#define CFG_DAVINCI_PLL2_DIV2 0x01 /*====================================================*/ /* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ /* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ |
