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| author | Tom Rini <trini@ti.com> | 2013-07-25 08:22:08 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-07-25 08:51:51 -0400 |
| commit | aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c (patch) | |
| tree | 64eaea4d396dce4e0a30bb955b8240d4b199cdca /include/configs/adp-ag101p.h | |
| parent | 0b17998e509e5614633aee0a3c5d6248f8bc580b (diff) | |
| parent | c54fd3efa497876a33cc3c6e7df514ae53abc729 (diff) | |
| download | talos-obmc-uboot-aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c.tar.gz talos-obmc-uboot-aaf5e825606a70ddc8fca8e366d8c16a6fd3cc7c.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-nds32
Diffstat (limited to 'include/configs/adp-ag101p.h')
| -rw-r--r-- | include/configs/adp-ag101p.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h index e761362ee1..48afbf4467 100644 --- a/include/configs/adp-ag101p.h +++ b/include/configs/adp-ag101p.h @@ -20,6 +20,13 @@ #define CONFIG_SKIP_LOWLEVEL_INIT +/* + * Definitions related to passing arguments to kernel. + */ +#define CONFIG_CMDLINE_TAG /* send commandline to Kernel */ +#define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */ +#define CONFIG_INITRD_TAG /* send initrd params */ + #ifndef CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_MEM_REMAP #endif @@ -101,7 +108,9 @@ #define CONFIG_DOS_PARTITION #define CONFIG_FTSDC010 #define CONFIG_FTSDC010_NUMBER 1 +#define CONFIG_FTSDC010_SDIO #define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT2 /* * Command line configuration. @@ -221,6 +230,10 @@ #define CONFIG_SYS_FTSDMC021_BANK0_BSR (FTSDMC021_BANK_ENABLE | \ CONFIG_SYS_FTSDMC021_BANK0_BASE) +#define CONFIG_SYS_FTSDMC021_BANK1_BASE \ + (CONFIG_SYS_FTAHBC020S_SLAVE_BSR_BASE + (PHYS_SDRAM_0_SIZE >> 20)) +#define CONFIG_SYS_FTSDMC021_BANK1_BSR (FTSDMC021_BANK_ENABLE | \ + CONFIG_SYS_FTSDMC021_BANK1_BASE) #endif /* @@ -234,9 +247,12 @@ #else /* !CONFIG_SKIP_LOWLEVEL_INIT && !CONFIG_MEM_REMAP */ #define PHYS_SDRAM_0 0x10000000 /* SDRAM Bank #1 */ #endif +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 bank of DRAM */ #define PHYS_SDRAM_0_SIZE 0x04000000 /* 64 MB */ +#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0 |
