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| author | Jens Gehrlein <jens.gehrlein@tqs.de> | 2007-09-26 17:55:54 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-12-27 01:59:50 +0100 |
| commit | 22d1a56cbfb0bff34f477b4db6a55d076d829b83 (patch) | |
| tree | b8206a0016a00d0d13564b2ff22c080cadf9f762 /include/configs/TQM885D.h | |
| parent | b988b8cd443989be65161888eea0127ad03f846f (diff) | |
| download | talos-obmc-uboot-22d1a56cbfb0bff34f477b4db6a55d076d829b83.tar.gz talos-obmc-uboot-22d1a56cbfb0bff34f477b4db6a55d076d829b83.zip | |
TQM885D: Exchanged SDRAM timing by a more relaxed timing.
CAS-Latency=2, Write Recovery Time tWR=2
The max. supported bus frequency is 66 MHz. Therefore, changed
threshold to switch from 1:1 mode to 2:1 from 80 MHz to 66 MHz.
Signed-off-by: Martin Krause <martin.krause@tqs.de>
Diffstat (limited to 'include/configs/TQM885D.h')
| -rw-r--r-- | include/configs/TQM885D.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h index dd26d54262..e0c69652bb 100644 --- a/include/configs/TQM885D.h +++ b/include/configs/TQM885D.h @@ -42,7 +42,7 @@ #define CONFIG_8xx_OSCLK 10000000 /* 10 MHz - PLL input clock */ #define CFG_8xx_CPUCLK_MIN 15000000 /* 15 MHz - CPU minimum clock */ #define CFG_8xx_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */ -#define CONFIG_8xx_CPUCLK_DEFAULT 66000000 /* 50 MHz - CPU default clock */ +#define CONFIG_8xx_CPUCLK_DEFAULT 66000000 /* 66 MHz - CPU default clock */ /* (it will be used if there is no */ /* 'cpuclk' variable with valid value) */ |
