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| author | Liu Gang <Gang.Liu@freescale.com> | 2013-05-07 16:30:46 +0800 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2013-06-20 17:08:48 -0500 |
| commit | c8b281524bf98ee5a52db7da71bccdea002df3f5 (patch) | |
| tree | 969e1e223b675ac6df5021e3090d9a18fc9dcbe8 /include/configs/P5020DS.h | |
| parent | 5a516748a8e003aa80eab259cbf94026a6e30c93 (diff) | |
| download | talos-obmc-uboot-c8b281524bf98ee5a52db7da71bccdea002df3f5.tar.gz talos-obmc-uboot-c8b281524bf98ee5a52db7da71bccdea002df3f5.zip | |
powerpc/boot: Change the macro of Boot from SRIO and PCIE master module
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.
Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'include/configs/P5020DS.h')
| -rw-r--r-- | include/configs/P5020DS.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/configs/P5020DS.h b/include/configs/P5020DS.h index 778230d335..d1e27c42d4 100644 --- a/include/configs/P5020DS.h +++ b/include/configs/P5020DS.h @@ -41,7 +41,7 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ - +#define CONFIG_SRIO_PCIE_BOOT_MASTER #define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */ #include "corenet_ds.h" |
