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| author | Shaohui Xie <Shaohui.Xie@freescale.com> | 2013-09-10 16:15:07 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2013-09-10 14:25:28 -0700 |
| commit | 2bd1aab02b1bedd1be72b0e417b0ac489de35c15 (patch) | |
| tree | cbcb41cf214182c1a4872b257b772da69f37d2ae /include/configs/P2041RDB.h | |
| parent | 985a71d15b8bd9cfbeae1ac1b08a5319abfd246c (diff) | |
| download | talos-obmc-uboot-2bd1aab02b1bedd1be72b0e417b0ac489de35c15.tar.gz talos-obmc-uboot-2bd1aab02b1bedd1be72b0e417b0ac489de35c15.zip | |
powerpc/p2041: fix I2C controller's offset
Without this patch, SPD access will fail which leads to DDR init fail.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs/P2041RDB.h')
| -rw-r--r-- | include/configs/P2041RDB.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 905bacfa96..862614b5c2 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -354,10 +354,10 @@ unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_FSL #define CONFIG_SYS_FSL_I2C_SPEED 400000 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 +#define CONFIG_SYS_FSL_I2C_OFFSET 0x118000 #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 +#define CONFIG_SYS_FSL_I2C2_OFFSET 0x118100 /* * RapidIO |
