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authorYork Sun <yorksun@freescale.com>2011-08-26 11:32:45 -0700
committerKumar Gala <galak@kernel.crashing.org>2011-09-29 19:01:06 -0500
commitd4b9106609a67617d8cef3bb6bce124974865388 (patch)
tree4bd57192ca2396fe074460924100062b24bf1feb /include/configs/MPC8349EMDS.h
parentd29d17d7badcf90a31e5d6d1d9a82838ea039a42 (diff)
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powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
Update MPC8349EMDS to use unified DDR driver instead of spd_sdram.c. The unified driver can initialize data using DDR controller. No need to use DMA if just to initialze for ECC. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8349EMDS.h')
-rw-r--r--include/configs/MPC8349EMDS.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 45b6b5f854..da2b11da8e 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -78,6 +78,22 @@
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
+ * define CONFIG_FSL_DDR2 to use unified DDR driver
+ * undefine it to use old spd_sdram.c
+ */
+#define CONFIG_FSL_DDR2
+#ifdef CONFIG_FSL_DDR2
+#define CONFIG_SYS_SPD_BUS_NUM 0
+#define SPD_EEPROM_ADDRESS1 0x52
+#define SPD_EEPROM_ADDRESS2 0x51
+#define CONFIG_NUM_DDR_CONTROLLERS 1
+#define CONFIG_DIMM_SLOTS_PER_CTLR 2
+#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#endif
+
+/*
* 32-bit data path mode.
*
* Please note that using this mode for devices with the real density of 64-bit
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