AVR32: Resource management rewrite

Rewrite the resource management code (i.e. I/O memory, clock gating,
gpio) so it doesn't depend on any global state. This is necessary
because this code is heavily used before relocation to RAM, so we
can't write to any global variables.

As an added bonus, this makes u-boot's memory footprint a bit smaller,
although some functionality has been left out; all clocks are enabled
all the time, and there's no checking for gpio line conflicts.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>

2 files changed, 34 insertions, 22 deletions

diff --git a/drivers/atmel_usart.c b/drivers/atmel_usart.c
index 41c37683d7..f35b99730f 100644
--- a/drivers/atmel_usart.c
+++ b/drivers/atmel_usart.c
@@ -19,7 +19,22 @@
 
 #ifdef CONFIG_ATMEL_USART
 #include <asm/io.h>
-#include <asm/arch/platform.h>
+#include <asm/arch/clk.h>
+#include <asm/arch/memory-map.h>
+
+#if defined(CONFIG_USART0)
+# define USART_ID	0
+# define USART_BASE	USART0_BASE
+#elif defined(CONFIG_USART1)
+# define USART_ID	1
+# define USART_BASE	USART1_BASE
+#elif defined(CONFIG_USART2)
+# define USART_ID	2
+# define USART_BASE	USART2_BASE
+#elif defined(CONFIG_USART3)
+# define USART_ID	3
+# define USART_BASE	USART3_BASE
+#endif
 
 #include "atmel_usart.h"
 
@@ -35,26 +50,23 @@ void serial_setbrg(void)
 	 * Baud Rate = --------------
 	 *                16 * CD
 	 */
-	usart_hz = pm_get_clock_freq(gd->console_uart->resource[0].u.clock.id);
+	usart_hz = get_usart_clk_rate(USART_ID);
 	divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate;
-	usart3_writel(gd->console_uart, BRGR, USART3_BF(CD, divisor));
+	usart3_writel(BRGR, USART3_BF(CD, divisor));
 }
 
 int serial_init(void)
 {
-	usart3_writel(gd->console_uart, CR,
-		      USART3_BIT(RSTRX) | USART3_BIT(RSTTX));
+	usart3_writel(CR, USART3_BIT(RSTRX) | USART3_BIT(RSTTX));
 
 	serial_setbrg();
 
-	usart3_writel(gd->console_uart, CR,
-		      USART3_BIT(RXEN) | USART3_BIT(TXEN));
-	usart3_writel(gd->console_uart, MR,
-		      USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
-		      | USART3_BF(USCLKS, USART3_USCLKS_MCK)
-		      | USART3_BF(CHRL, USART3_CHRL_8)
-		      | USART3_BF(PAR, USART3_PAR_NONE)
-		      | USART3_BF(NBSTOP, USART3_NBSTOP_1));
+	usart3_writel(CR, USART3_BIT(RXEN) | USART3_BIT(TXEN));
+	usart3_writel(MR, (USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL)
+			   | USART3_BF(USCLKS, USART3_USCLKS_MCK)
+			   | USART3_BF(CHRL, USART3_CHRL_8)
+			   | USART3_BF(PAR, USART3_PAR_NONE)
+			   | USART3_BF(NBSTOP, USART3_NBSTOP_1)));
 
 	return 0;
 }
@@ -64,8 +76,8 @@ void serial_putc(char c)
 	if (c == '\n')
 		serial_putc('\r');
 
-	while (!(usart3_readl(gd->console_uart, CSR) & USART3_BIT(TXRDY))) ;
-	usart3_writel(gd->console_uart, THR, c);
+	while (!(usart3_readl(CSR) & USART3_BIT(TXRDY))) ;
+	usart3_writel(THR, c);
 }
 
 void serial_puts(const char *s)
@@ -76,13 +88,13 @@ void serial_puts(const char *s)
 
 int serial_getc(void)
 {
-	while (!(usart3_readl(gd->console_uart, CSR) & USART3_BIT(RXRDY))) ;
-	return usart3_readl(gd->console_uart, RHR);
+	while (!(usart3_readl(CSR) & USART3_BIT(RXRDY))) ;
+	return usart3_readl(RHR);
 }
 
 int serial_tstc(void)
 {
-	return (usart3_readl(gd->console_uart, CSR) & USART3_BIT(RXRDY)) != 0;
+	return (usart3_readl(CSR) & USART3_BIT(RXRDY)) != 0;
 }
 
 #endif /* CONFIG_ATMEL_USART */
diff --git a/drivers/atmel_usart.h b/drivers/atmel_usart.h
index fad90a8116..af3773a99f 100644
--- a/drivers/atmel_usart.h
+++ b/drivers/atmel_usart.h
@@ -306,9 +306,9 @@
 	 | USART3_BF(name,value))
 
 /* Register access macros */
-#define usart3_readl(port,reg)				\
-	readl((port)->regs + USART3_##reg)
-#define usart3_writel(port,reg,value)			\
-	writel((value), (port)->regs + USART3_##reg)
+#define usart3_readl(reg)				\
+	readl((void *)USART_BASE + USART3_##reg)
+#define usart3_writel(reg,value)			\
+	writel((value), (void *)USART_BASE + USART3_##reg)
 
 #endif /* __DRIVERS_ATMEL_USART_H__ */