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| author | Vikas Manocha <vikas.manocha@st.com> | 2015-07-02 18:29:44 -0700 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2015-07-03 13:50:53 +0530 |
| commit | 90a2f7171182f3b96c28b2dcff67b02a3164cdb1 (patch) | |
| tree | dfd0eb215dab5e1c4ea8c8d1a7eeb0d977013c84 /drivers | |
| parent | c0535c0ef0b7e7a3e4c1011266bf26baf94fd4a3 (diff) | |
| download | talos-obmc-uboot-90a2f7171182f3b96c28b2dcff67b02a3164cdb1.tar.gz talos-obmc-uboot-90a2f7171182f3b96c28b2dcff67b02a3164cdb1.zip | |
spi: cadence_qspi: get sram size from device tree
sram size could be different on different socs, e.g. on stv0991 it is 256 while
on altera platform it is 128. It is better to receive it from device tree.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/spi/cadence_qspi.c | 1 | ||||
| -rw-r--r-- | drivers/spi/cadence_qspi.h | 1 | ||||
| -rw-r--r-- | drivers/spi/cadence_qspi_apb.c | 6 |
3 files changed, 3 insertions, 5 deletions
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index a75fc46e95..34a0f46a1a 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -309,6 +309,7 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus) plat->tsd2d_ns = fdtdec_get_int(blob, subnode, "tsd2d-ns", 255); plat->tchsh_ns = fdtdec_get_int(blob, subnode, "tchsh-ns", 20); plat->tslch_ns = fdtdec_get_int(blob, subnode, "tslch-ns", 20); + plat->sram_size = fdtdec_get_int(blob, node, "sram-size", 128); debug("%s: regbase=%p ahbbase=%p max-frequency=%d page-size=%d\n", __func__, plat->regbase, plat->ahbbase, plat->max_hz, diff --git a/drivers/spi/cadence_qspi.h b/drivers/spi/cadence_qspi.h index c9a6142e82..98e57aa5bc 100644 --- a/drivers/spi/cadence_qspi.h +++ b/drivers/spi/cadence_qspi.h @@ -25,6 +25,7 @@ struct cadence_spi_platdata { u32 tsd2d_ns; u32 tchsh_ns; u32 tslch_ns; + u32 sram_size; }; struct cadence_spi_priv { diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index fb78892f18..cbf0d428dd 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -36,9 +36,6 @@ #define CQSPI_FIFO_WIDTH (4) -/* Controller sram size in word */ -#define CQSPI_REG_SRAM_SIZE_WORD (128) -#define CQSPI_REG_SRAM_PARTITION_RD (CQSPI_REG_SRAM_SIZE_WORD/2) #define CQSPI_REG_SRAM_THRESHOLD_WORDS (50) /* Transfer mode */ @@ -536,8 +533,7 @@ void cadence_qspi_apb_controller_init(struct cadence_spi_platdata *plat) writel(0, plat->regbase + CQSPI_REG_REMAP); /* Indirect mode configurations */ - writel(CQSPI_REG_SRAM_PARTITION_RD, - plat->regbase + CQSPI_REG_SRAMPARTITION); + writel((plat->sram_size/2), plat->regbase + CQSPI_REG_SRAMPARTITION); /* Disable all interrupts */ writel(0, plat->regbase + CQSPI_REG_IRQMASK); |
