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authorVignesh R <vigneshr@ti.com>2015-08-17 15:20:13 +0530
committerJagan Teki <jteki@openedev.com>2015-08-17 23:29:15 +0530
commit8ddd9c485f17de4bea55707f5b9cf07fd0a89ed0 (patch)
tree73e2e59fa074d442d79c9a74bd9d937e0b886edf /drivers
parent664ab2c992d1e06c4381f66c93d2e155fc7722e1 (diff)
downloadtalos-obmc-uboot-8ddd9c485f17de4bea55707f5b9cf07fd0a89ed0.tar.gz
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spi: ti_qspi: Use DMA to read from qspi flash
ti_qspi uses memory map mode for faster read. Enabling DMA will increase read speed by 3x @48MHz on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/ti_qspi.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/spi/ti_qspi.c b/drivers/spi/ti_qspi.c
index af40ec864f..bd63db8a2a 100644
--- a/drivers/spi/ti_qspi.c
+++ b/drivers/spi/ti_qspi.c
@@ -13,6 +13,8 @@
#include <spi.h>
#include <asm/gpio.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
+#include <asm/ti-common/ti-edma3.h>
/* ti qpsi register bit masks */
#define QSPI_TIMEOUT 2000000
@@ -347,3 +349,26 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
return 0;
}
+
+/* TODO: control from sf layer to here through dm-spi */
+#ifdef CONFIG_TI_EDMA3
+void spi_flash_copy_mmap(void *data, void *offset, size_t len)
+{
+ unsigned int addr = (unsigned int) (data);
+ unsigned int edma_slot_num = 1;
+
+ /* Invalidate the area, so no writeback into the RAM races with DMA */
+ invalidate_dcache_range(addr, addr + roundup(len, ARCH_DMA_MINALIGN));
+
+ /* enable edma3 clocks */
+ enable_edma3_clocks();
+
+ /* Call edma3 api to do actual DMA transfer */
+ edma3_transfer(EDMA3_BASE, edma_slot_num, data, offset, len);
+
+ /* disable edma3 clocks */
+ disable_edma3_clocks();
+
+ *((unsigned int *)offset) += len;
+}
+#endif
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