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| author | Marek Vasut <marex@denx.de> | 2015-07-17 02:21:47 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:15 +0200 |
| commit | 33c42bb88c99ccd5d028236b5dc022cd1a542f3a (patch) | |
| tree | 4c4d1e1f8a4490461be8b2c8e07a03999893402c /drivers | |
| parent | 722c96857044831f46c9bdf263a84ad6d5c87463 (diff) | |
| download | talos-obmc-uboot-33c42bb88c99ccd5d028236b5dc022cd1a542f3a.tar.gz talos-obmc-uboot-33c42bb88c99ccd5d028236b5dc022cd1a542f3a.zip | |
ddr: altera: Internal mem_calibrate() cleanup part 1
This is kind of microseries-within-series indent cleanup.
Rework the code for the first loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 40 |
1 files changed, 17 insertions, 23 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index 77a13089cc..59c09b64f9 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -3270,6 +3270,9 @@ static uint32_t mem_calibrate(void) uint32_t group_failed = 0; uint32_t sr_failed = 0; + const u32 rwdqs_ratio = RW_MGR_MEM_IF_READ_DQS_WIDTH / + RW_MGR_MEM_IF_WRITE_DQS_WIDTH; + debug("%s:%d\n", __func__, __LINE__); /* Initialize the data settings */ @@ -3339,31 +3342,22 @@ static uint32_t mem_calibrate(void) SCC_MGR_GROUP_COUNTER_OFFSET); scc_mgr_zero_group(write_group, 0); - for (read_group = write_group * - RW_MGR_MEM_IF_READ_DQS_WIDTH / - RW_MGR_MEM_IF_WRITE_DQS_WIDTH, - read_test_bgn = 0; - read_group < (write_group + 1) * - RW_MGR_MEM_IF_READ_DQS_WIDTH / - RW_MGR_MEM_IF_WRITE_DQS_WIDTH && - group_failed == 0; - read_group++, read_test_bgn += - RW_MGR_MEM_DQ_PER_READ_DQS) { + for (read_group = write_group * rwdqs_ratio, + read_test_bgn = 0; + read_group < (write_group + 1) * rwdqs_ratio && group_failed == 0; + read_group++, + read_test_bgn += RW_MGR_MEM_DQ_PER_READ_DQS) { + if (STATIC_CALIB_STEPS & CALIB_SKIP_VFIFO) + continue; + /* Calibrate the VFIFO */ - if (!((STATIC_CALIB_STEPS) & - CALIB_SKIP_VFIFO)) { - if (!rw_mgr_mem_calibrate_vfifo - (read_group, - read_test_bgn)) { - group_failed = 1; + if (rw_mgr_mem_calibrate_vfifo(read_group, + read_test_bgn)) + continue; - if (!(gbl-> - phy_debug_mode_flags & - PHY_DEBUG_SWEEP_ALL_GROUPS)) { - return 0; - } - } - } + group_failed = 1; + if (!(gbl->phy_debug_mode_flags & PHY_DEBUG_SWEEP_ALL_GROUPS)) + return 0; } /* Calibrate the output side */ |
