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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-08-13 22:50:30 +0200
committerScott Wood <scottwood@freescale.com>2012-09-17 19:51:45 -0500
commit13927f07334ce47a975c2e2a5bcd6bb708692534 (patch)
tree99af1e7fdb8c4e4ed054399c50e11d4c7cd12376 /drivers
parent7c28a1cfdf5e919f2a09abb644f614f1b67d3322 (diff)
downloadtalos-obmc-uboot-13927f07334ce47a975c2e2a5bcd6bb708692534.tar.gz
talos-obmc-uboot-13927f07334ce47a975c2e2a5bcd6bb708692534.zip
mtd mxc nand: Merge init functions
Merge mxc_setup_config1() into board_nand_init() in order to ease the addition of i.MX5 support in the following patches. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mtd/nand/mxc_nand.c53
1 files changed, 23 insertions, 30 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 2ae41dcd1b..e743796a09 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -1137,24 +1137,6 @@ void mxc_nand_command(struct mtd_info *mtd, unsigned command,
}
}
-#ifdef MXC_NFC_V1_1
-static void mxc_setup_config1(void)
-{
- uint16_t tmp;
-
- tmp = readw(&host->regs->config1);
- tmp |= NFC_ONE_CYCLE;
- tmp |= NFC_4_8N_ECC;
- writew(tmp, &host->regs->config1);
- if (host->pagesize_2k)
- writew(64/2, &host->regs->spare_area_size);
- else
- writew(16/2, &host->regs->spare_area_size);
-}
-#else
-#define mxc_setup_config1()
-#endif
-
#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
static u8 bbt_pattern[] = {'B', 'b', 't', '0' };
@@ -1244,6 +1226,29 @@ int board_nand_init(struct nand_chip *this)
/* Reset NAND */
this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
+ /* NAND bus width determines access functions used by upper layer */
+ if (is_16bit_nand())
+ this->options |= NAND_BUSWIDTH_16;
+
+#ifdef CONFIG_SYS_NAND_LARGEPAGE
+ host->pagesize_2k = 1;
+ this->ecc.layout = &nand_hw_eccoob2k;
+#else
+ host->pagesize_2k = 0;
+ this->ecc.layout = &nand_hw_eccoob;
+#endif
+
+#ifdef MXC_NFC_V1_1
+ tmp = readw(&host->regs->config1);
+ tmp |= NFC_ONE_CYCLE;
+ tmp |= NFC_4_8N_ECC;
+ writew(tmp, &host->regs->config1);
+ if (host->pagesize_2k)
+ writew(64/2, &host->regs->spare_area_size);
+ else
+ writew(16/2, &host->regs->spare_area_size);
+#endif
+
/*
* preset operation
* Unlock the internal RAM Buffer
@@ -1268,17 +1273,5 @@ int board_nand_init(struct nand_chip *this)
/* Unlock Block Command for given address range */
writew(0x4, &host->regs->wrprot);
- /* NAND bus width determines access functions used by upper layer */
- if (is_16bit_nand())
- this->options |= NAND_BUSWIDTH_16;
-
-#ifdef CONFIG_SYS_NAND_LARGEPAGE
- host->pagesize_2k = 1;
- this->ecc.layout = &nand_hw_eccoob2k;
-#else
- host->pagesize_2k = 0;
- this->ecc.layout = &nand_hw_eccoob;
-#endif
- mxc_setup_config1();
return 0;
}
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