diff options
| author | Marek Vasut <marex@denx.de> | 2015-07-26 11:44:54 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2015-08-08 14:14:24 +0200 |
| commit | 0c1b81bdf391b99863a5f8ffa8eb81c5d1cad3f6 (patch) | |
| tree | 1e79a5c81828edf802b75c7f3d8f9d2b6db4e184 /drivers | |
| parent | 6a39be6ca93bfeb7f89d5ae2c170ea929d8222a0 (diff) | |
| download | talos-obmc-uboot-0c1b81bdf391b99863a5f8ffa8eb81c5d1cad3f6.tar.gz talos-obmc-uboot-0c1b81bdf391b99863a5f8ffa8eb81c5d1cad3f6.zip | |
ddr: altera: Clean up of delay_for_n_mem_clocks() part 4
Simplify the loop code, optimizing compiler can deal with this.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/ddr/altera/sequencer.c | 17 |
1 files changed, 5 insertions, 12 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c index ed4d791af0..d4e720f8db 100644 --- a/drivers/ddr/altera/sequencer.c +++ b/drivers/ddr/altera/sequencer.c @@ -822,18 +822,11 @@ static void delay_for_n_mem_clocks(const u32 clocks) writel(RW_MGR_IDLE_LOOP2, &sdr_rw_load_jump_mgr_regs->load_jump_add1); - /* hack to get around compiler not being smart enough */ - if (afi_clocks <= 0x10000) { - /* only need to run once */ - writel(RW_MGR_IDLE_LOOP2, SDR_PHYGRP_RWMGRGRP_ADDRESS | - RW_MGR_RUN_SINGLE_GROUP_OFFSET); - } else { - do { - writel(RW_MGR_IDLE_LOOP2, - SDR_PHYGRP_RWMGRGRP_ADDRESS | - RW_MGR_RUN_SINGLE_GROUP_OFFSET); - } while (c_loop-- != 0); - } + do { + writel(RW_MGR_IDLE_LOOP2, + SDR_PHYGRP_RWMGRGRP_ADDRESS | + RW_MGR_RUN_SINGLE_GROUP_OFFSET); + } while (c_loop-- != 0); } debug("%s:%d clocks=%u ... end\n", __func__, __LINE__, clocks); } |
