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| author | Paul Kocialkowski <contact@paulk.fr> | 2015-03-22 18:12:22 +0100 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2015-04-15 16:17:17 +0200 |
| commit | 487b3277d4f70bcb2e4a1930beb6438565f25910 (patch) | |
| tree | cc74dd0cd05c1be8af48cd1ca95c4b6f949b8712 /drivers/video | |
| parent | 81f11872f3315a767940820e46d1a15b42d9b60c (diff) | |
| download | talos-obmc-uboot-487b3277d4f70bcb2e4a1930beb6438565f25910.tar.gz talos-obmc-uboot-487b3277d4f70bcb2e4a1930beb6438565f25910.zip | |
sunxi: GPIO pin mux hardware-feature-specific function index defines
Each hardware feature exposed through the GPIO pin mux is usually using the same
function index (for a given port), so there is no need to define one value per
pin: one value per hardware feature per port is sufficient, avoids duplication
and makes everything easier to understand.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/video')
| -rw-r--r-- | drivers/video/sunxi_display.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/video/sunxi_display.c b/drivers/video/sunxi_display.c index 4e12150027..d2341b0e36 100644 --- a/drivers/video/sunxi_display.c +++ b/drivers/video/sunxi_display.c @@ -665,10 +665,10 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode, for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) #ifdef CONFIG_VIDEO_LCD_IF_PARALLEL - sunxi_gpio_set_cfgpin(pin, SUNXI_GPD0_LCD0); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0); #endif #ifdef CONFIG_VIDEO_LCD_IF_LVDS - sunxi_gpio_set_cfgpin(pin, SUNXI_GPD0_LVDS0); + sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LVDS0); #endif sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double); @@ -779,8 +779,8 @@ static void sunxi_lcdc_tcon1_mode_set(const struct ctfb_res_modes *mode, &lcdc->tcon1_timing_sync); if (use_portd_hvsync) { - sunxi_gpio_set_cfgpin(SUNXI_GPD(26), SUNXI_GPD0_LCD0); - sunxi_gpio_set_cfgpin(SUNXI_GPD(27), SUNXI_GPD0_LCD0); + sunxi_gpio_set_cfgpin(SUNXI_GPD(26), SUNXI_GPD_LCD0); + sunxi_gpio_set_cfgpin(SUNXI_GPD(27), SUNXI_GPD_LCD0); val = 0; if (mode->sync & FB_SYNC_HOR_HIGH_ACT) |
