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authorPeng Fan <Peng.Fan@freescale.com>2014-11-10 08:50:39 +0800
committerMarek Vasut <marex@denx.de>2014-11-14 20:56:54 +0100
commit229dbba9b1a24d8f371f18fa8ff13a4cca864f06 (patch)
tree756144412d42d215156e3913a7b5d39704b7e40e /drivers/usb/host/ehci-mx6.c
parent0d485b9095328cdc81b2ee94ff59b988c69b9127 (diff)
downloadtalos-obmc-uboot-229dbba9b1a24d8f371f18fa8ff13a4cca864f06.tar.gz
talos-obmc-uboot-229dbba9b1a24d8f371f18fa8ff13a4cca864f06.zip
usb:ehci-mx6 add phy mode query function
usb_phy_enable should return status bit, but not phy mode bit, thus add a new function usb_phy_mode to query the PHY for it's mode and make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'. Include a new board weak function board_usb_phy_mode. If board code does not reimplement this function, it just call usb_phy_mode and return usb_phy_mode's return value. The reason to include such a weak function is: " SOC OTG core <--connect--> board HOST port, but no pin id for the board host port, so board can not use usb_phy_mode to return the phy mode, but define it's own rule." Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye Li <B37916@freescale.com>
Diffstat (limited to 'drivers/usb/host/ehci-mx6.c')
-rw-r--r--drivers/usb/host/ehci-mx6.c27
1 files changed, 25 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
index 9ec5a0a539..951dd3b25f 100644
--- a/drivers/usb/host/ehci-mx6.c
+++ b/drivers/usb/host/ehci-mx6.c
@@ -160,7 +160,7 @@ static int usb_phy_enable(int index, struct usb_ehci *ehci)
val |= (USBPHY_CTRL_ENUTMILEVEL2 | USBPHY_CTRL_ENUTMILEVEL3);
__raw_writel(val, phy_ctrl);
- return val & USBPHY_CTRL_OTG_ID;
+ return 0;
}
/* Base address for this IP block is 0x02184800 */
@@ -193,6 +193,28 @@ static void usb_oc_config(int index)
__raw_writel(val, ctrl);
}
+int usb_phy_mode(int port)
+{
+ void __iomem *phy_reg;
+ void __iomem *phy_ctrl;
+ u32 val;
+
+ phy_reg = (void __iomem *)phy_bases[port];
+ phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
+
+ val = __raw_readl(phy_ctrl);
+
+ if (val & USBPHY_CTRL_OTG_ID)
+ return USB_INIT_DEVICE;
+ else
+ return USB_INIT_HOST;
+}
+
+int __weak board_usb_phy_mode(int port)
+{
+ return usb_phy_mode(port);
+}
+
int __weak board_ehci_hcd_init(int port)
{
return 0;
@@ -221,7 +243,8 @@ int ehci_hcd_init(int index, enum usb_init_type init,
usb_power_config(index);
usb_oc_config(index);
usb_internal_phy_clock_gate(index, 1);
- type = usb_phy_enable(index, ehci) ? USB_INIT_DEVICE : USB_INIT_HOST;
+ usb_phy_enable(index, ehci);
+ type = board_usb_phy_mode(index);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t)*hccr +
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