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| author | Michal Simek <michal.simek@xilinx.com> | 2015-12-09 14:44:38 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2016-01-27 15:55:50 +0100 |
| commit | 0d78abf5ba68e579c5851959565c1049d14af2a0 (patch) | |
| tree | cd414735324f96aae305c733bbcf57e6ec194663 /drivers/net/xilinx_axi_emac.c | |
| parent | 6609f35b9386f54af1c2ea43a4eb75fce3dc648f (diff) | |
| download | talos-obmc-uboot-0d78abf5ba68e579c5851959565c1049d14af2a0.tar.gz talos-obmc-uboot-0d78abf5ba68e579c5851959565c1049d14af2a0.zip | |
net: axi_emac: Pass private structure to phyread/phywrite
Prepare for move to DM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Diffstat (limited to 'drivers/net/xilinx_axi_emac.c')
| -rw-r--r-- | drivers/net/xilinx_axi_emac.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 3c98065772..20ff6b0898 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -164,10 +164,10 @@ static inline int mdio_wait(struct axi_regs *regs) return 0; } -static u32 phyread(struct eth_device *dev, u32 phyaddress, u32 registernum, - u16 *val) +static u32 phyread(struct axidma_priv *priv, u32 phyaddress, u32 registernum, + u16 *val) { - struct axi_regs *regs = (struct axi_regs *)dev->iobase; + struct axi_regs *regs = priv->iobase; u32 mdioctrlreg = 0; if (mdio_wait(regs)) @@ -190,10 +190,10 @@ static u32 phyread(struct eth_device *dev, u32 phyaddress, u32 registernum, return 0; } -static u32 phywrite(struct eth_device *dev, u32 phyaddress, u32 registernum, - u32 data) +static u32 phywrite(struct axidma_priv *priv, u32 phyaddress, u32 registernum, + u32 data) { - struct axi_regs *regs = (struct axi_regs *)dev->iobase; + struct axi_regs *regs = priv->iobase; u32 mdioctrlreg = 0; if (mdio_wait(regs)) @@ -236,7 +236,7 @@ static int setup_phy(struct eth_device *dev) if (priv->phyaddr == -1) { /* Detect the PHY address */ for (i = 31; i >= 0; i--) { - ret = phyread(dev, i, PHY_DETECT_REG, &phyreg); + ret = phyread(priv, i, PHY_DETECT_REG, &phyreg); if (!ret && (phyreg != 0xFFFF) && ((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { /* Found a valid PHY address */ @@ -589,7 +589,7 @@ static int axiemac_miiphy_read(const char *devname, uchar addr, struct eth_device *dev = eth_get_dev(); u32 ret; - ret = phyread(dev, addr, reg, val); + ret = phyread(dev->priv, addr, reg, val); debug("axiemac: Read MII 0x%x, 0x%x, 0x%x\n", addr, reg, *val); return ret; } @@ -600,7 +600,7 @@ static int axiemac_miiphy_write(const char *devname, uchar addr, struct eth_device *dev = eth_get_dev(); debug("axiemac: Write MII 0x%x, 0x%x, 0x%x\n", addr, reg, val); - return phywrite(dev, addr, reg, val); + return phywrite(dev->priv, addr, reg, val); } static int axiemac_bus_reset(struct mii_dev *bus) |
