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| author | Andre Schwarz <andre.schwarz@matrix-vision.de> | 2008-04-29 19:18:32 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-05-03 23:27:04 +0200 |
| commit | 9acde129cc3f9c1b3bc11a821480dd446774d618 (patch) | |
| tree | 408342b2cea52b5b979c0ca86bb5c4af95027076 /drivers/net/tsec.c | |
| parent | 27c38689d0cfde0e444239345f97b5eecc9f4067 (diff) | |
| download | talos-obmc-uboot-9acde129cc3f9c1b3bc11a821480dd446774d618.tar.gz talos-obmc-uboot-9acde129cc3f9c1b3bc11a821480dd446774d618.zip | |
TSEC: add config options for VSC8601 RGMII PHY
The Vitesse VSC8601 RGMII PHY has internal delay for both Rx
and Tx clock lines. They are configured using 2 bits in extended
register 0x17.
Therefore CFG_VSC8601_SKEW_TX and CFG_VSC8601_SKEW_RX have
been introduced with valid values 0-3 giving 0.0, 1.4,1.7 and 2.0ns delay.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
--
drivers/net/tsec.c | 6 ++++++
drivers/net/tsec.h | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
Diffstat (limited to 'drivers/net/tsec.c')
| -rw-r--r-- | drivers/net/tsec.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 9d22aa38be..f86bfd7eea 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1277,6 +1277,12 @@ struct phy_info phy_info_VSC8601 = { {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, #ifdef CFG_VSC8601_SKEWFIX {MIIM_VSC8601_EPHY_CON,MIIM_VSC8601_EPHY_CON_INIT_SKEW,NULL}, +if defined(CFG_VSC8601_SKEW_TX) && defined(CFG_VSC8601_SKEW_RX) + {MIIM_EXT_PAGE_ACCESS,1,NULL}, +#define VSC8101_SKEW (CFG_VSC8601_SKEW_TX<<14)|(CFG_VSC8601_SKEW_RX<<12) + {MIIM_VSC8601_SKEW_CTRL,VSC8101_SKEW,NULL}, + {MIIM_EXT_PAGE_ACCESS,0,NULL}, +#endif #endif {miim_end,} }, |
