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authorStefan Roese <sr@denx.de>2013-12-05 07:58:06 +0100
committerScott Wood <scottwood@freescale.com>2013-12-17 17:31:14 -0600
commit5d7a49b930156514ce9d418e26b5bf21673fd399 (patch)
treec2cde1435374fb2c8d0c00e15e6e0abd8faddbe9 /drivers/mtd
parent69cc97f8dbf898d732fbd04852cf1068aeb991ba (diff)
downloadtalos-obmc-uboot-5d7a49b930156514ce9d418e26b5bf21673fd399.tar.gz
talos-obmc-uboot-5d7a49b930156514ce9d418e26b5bf21673fd399.zip
mtd: nand: omap_gpmc: cosmetic: Fix indentation
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pekon Gupta <pekon@ti.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: wrap some long lines] Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/omap_gpmc.c88
1 files changed, 45 insertions, 43 deletions
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 23a961c9d4..20679694f3 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -283,53 +283,55 @@ static void omap_hwecc_init_bch(struct nand_chip *chip, int32_t mode)
if (bch->ecc_scheme == OMAP_ECC_BCH8_CODE_HW) {
wr_mode = BCH_WRAPMODE_1;
- switch (bch->nibbles) {
- case ECC_BCH4_NIBBLES:
- unused_length = 3;
- break;
- case ECC_BCH8_NIBBLES:
- unused_length = 2;
- break;
- case ECC_BCH16_NIBBLES:
- unused_length = 0;
- break;
- }
-
- /*
- * This is ecc_size_config for ELM mode.
- * Here we are using different settings for read and write access and
- * also depending on BCH strength.
- */
- switch (mode) {
- case NAND_ECC_WRITE:
- /* write access only setup eccsize1 config */
- val = ((unused_length + bch->nibbles) << 22);
- break;
+ switch (bch->nibbles) {
+ case ECC_BCH4_NIBBLES:
+ unused_length = 3;
+ break;
+ case ECC_BCH8_NIBBLES:
+ unused_length = 2;
+ break;
+ case ECC_BCH16_NIBBLES:
+ unused_length = 0;
+ break;
+ }
- case NAND_ECC_READ:
- default:
/*
- * by default eccsize0 selected for ecc1resultsize
- * eccsize0 config.
+ * This is ecc_size_config for ELM mode. Here we are using
+ * different settings for read and write access and also
+ * depending on BCH strength.
*/
- val = (bch->nibbles << 12);
- /* eccsize1 config */
- val |= (unused_length << 22);
- break;
- }
+ switch (mode) {
+ case NAND_ECC_WRITE:
+ /* write access only setup eccsize1 config */
+ val = ((unused_length + bch->nibbles) << 22);
+ break;
+
+ case NAND_ECC_READ:
+ default:
+ /*
+ * by default eccsize0 selected for ecc1resultsize
+ * eccsize0 config.
+ */
+ val = (bch->nibbles << 12);
+ /* eccsize1 config */
+ val |= (unused_length << 22);
+ break;
+ }
} else {
- /*
- * This ecc_size_config setting is for BCH sw library.
- *
- * Note: we only support BCH8 currently with BCH sw library!
- * Should be really easy to adobt to BCH4, however some omap3 have
- * flaws with BCH4.
- *
- * Here we are using wrapping mode 6 both for reading and writing, with:
- * size0 = 0 (no additional protected byte in spare area)
- * size1 = 32 (skip 32 nibbles = 16 bytes per sector in spare area)
- */
- val = (32 << 22) | (0 << 12);
+ /*
+ * This ecc_size_config setting is for BCH sw library.
+ *
+ * Note: we only support BCH8 currently with BCH sw library!
+ * Should be really easy to adobt to BCH4, however some omap3
+ * have flaws with BCH4.
+ *
+ * Here we are using wrapping mode 6 both for reading and
+ * writing, with:
+ * size0 = 0 (no additional protected byte in spare area)
+ * size1 = 32 (skip 32 nibbles = 16 bytes per sector in
+ * spare area)
+ */
+ val = (32 << 22) | (0 << 12);
}
/* ecc size configuration */
writel(val, &gpmc_cfg->ecc_size_config);
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