summaryrefslogtreecommitdiffstats
path: root/doc
diff options
context:
space:
mode:
authorWolfgang Denk <wd@denx.de>2007-05-07 22:07:08 +0200
committerWolfgang Denk <wd@denx.de>2007-05-07 22:07:08 +0200
commit207b7b2c9d9752e0f6478c30c29b7087f6e6cbb6 (patch)
tree2cca7ebf538d4d906f1a3217b282a0579e667327 /doc
parentac4cd59d59c9bf3f89cb7a344abf8184d678f562 (diff)
downloadtalos-obmc-uboot-207b7b2c9d9752e0f6478c30c29b7087f6e6cbb6.tar.gz
talos-obmc-uboot-207b7b2c9d9752e0f6478c30c29b7087f6e6cbb6.zip
Get rid of duplicated file (see doc/README.SBC8560 instead)
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'doc')
-rw-r--r--doc/README.sbc856053
1 files changed, 0 insertions, 53 deletions
diff --git a/doc/README.sbc8560 b/doc/README.sbc8560
deleted file mode 100644
index 52592e3f41..0000000000
--- a/doc/README.sbc8560
+++ /dev/null
@@ -1,53 +0,0 @@
-The port was tested on Wind River System Sbc8560 board <www.windriver.com>.
-U-Boot was installed on the flash memory of the CPU card (no the SODIMM).
-
-NOTE: Please configure uboot compile to the proper PCI frequency and
-setup the appropriate DIP switch settings.
-
-SBC8560 board:
-
-Make sure boards switches are set to their appropriate conditions.
-Refer to the Engineering Reference Guide ERG-00300-002. Of particular
-importance are: 1)Tthe settings for JP4 (JP4 1-3 and 2-4), which
-select the on-board FLASH device (Intel 28F128Jx); 2) The settings
-for the Clock SW9 (33 MHz or 66 MHz).
-
- Note: SW9 Settings: 66 MHz
- 4:1 ratio CCB clocks:SYSCLK
- 3:1 ration e500 Core:CCB
- pos1 - on, pos2 - on, pos3 - off, pos4 - on, pos5 - off, pos6 - on
- Note: SW9 Settings: 33 MHz
- 8:1 ratio CCB clocks:SYSCLK
- 3:1 ration e500 Core:CCB
- pos1 - on, pos2 - on, pos3 - on, pos4 - off, pos5 - off, pos6 - on
-
-
-Flashing the FLASH device with the "Wind River ICE":
-
-1) Properly connect and configure the Wind River ICE to the
- target JTAG port. This includes running the SBC8560 register script.
- Make sure target memory can be read and written.
-
-2) Build the u-boot image:
- make distclean
- make SBC8560_66_config or SBC8560_33_config
- make CROSS_COMPILE=.../ELDK3.0/ppc_8xx-/ all
-
- Note: reference is made to the ELDK3.0 compiler but any 85xx cross-compiler
- should suffice.
-
-3) Convert the uboot (.elf) file to a uboot.bin file (using visionClick converter).
- The bin file should be converted from fffc0000 to ffffffff
-
-4) Setup the Flash Utility (tools menu) for:
-
- Determine the clock speed of the PCI bus and set SW9 accordingly
- Note: the speed of the PCI bus defaults to the slowest PCI card
- PlayBack the "default" register file for the SBC8560
- Select the uboot.bin file with zero bias
- Select the initialize Target prior to programming
- Select the V28F640Jx (8192 x 8) 1 device FLASH Algorithm
- Select the erase base address from FFFC0000 to FFFFFFFF
- Select the start address from 0 with size of 4000
-
-5) Erase and Program
OpenPOWER on IntegriCloud