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authorWolfgang Denk <wd@pollux.(none)>2005-09-23 11:05:55 +0200
committerWolfgang Denk <wd@pollux.(none)>2005-09-23 11:05:55 +0200
commit0c8721a466b5e0eca7e7fbe1007777fa82100541 (patch)
tree1f53decded27502be8593137739291a3de406d94 /doc
parenta6e6cf00367c0779eadb49915e40c55f0a787957 (diff)
downloadtalos-obmc-uboot-0c8721a466b5e0eca7e7fbe1007777fa82100541.tar.gz
talos-obmc-uboot-0c8721a466b5e0eca7e7fbe1007777fa82100541.zip
Cleanup (PPC4xx is AMCC now)
Diffstat (limited to 'doc')
-rw-r--r--doc/I2C_Edge_Conditions2
-rw-r--r--doc/README.bedbug4
-rw-r--r--doc/README.ebony4
-rw-r--r--doc/README.ml3002
-rw-r--r--doc/README.mpc85xxads2
-rw-r--r--doc/README.ocotea6
-rw-r--r--doc/README.ocotea-PIBS-to-U-Boot4
-rw-r--r--doc/README.ppc4402
8 files changed, 13 insertions, 13 deletions
diff --git a/doc/I2C_Edge_Conditions b/doc/I2C_Edge_Conditions
index be7f1bee1f..44d3478549 100644
--- a/doc/I2C_Edge_Conditions
+++ b/doc/I2C_Edge_Conditions
@@ -28,7 +28,7 @@ I2C Edge Conditions:
Notes
-----
-!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A IBM 4xx BUG!!!
+!!!THIS IS AN UNDOCUMENTED I2C BUS BUG, NOT A AMCC 4xx BUG!!!
This reset edge condition could possibly be present in every I2C
controller and device available. For boards where a I2C bus reset
diff --git a/doc/README.bedbug b/doc/README.bedbug
index 56aeb090c1..9cfb4217fe 100644
--- a/doc/README.bedbug
+++ b/doc/README.bedbug
@@ -2,7 +2,7 @@ BEDBUG Support for U-Boot
--------------------------
These changes implement the bedbug (emBEDded deBUGger) debugger in U-Boot.
-A specific implementation is made for the IBM405 processor but other flavors
+A specific implementation is made for the AMCC 405 processor but other flavors
can be easily implemented.
#####################
@@ -58,7 +58,7 @@ can be easily implemented.
routines are common to all PowerPC processors.
./cpu/ppc4xx/bedbug_405.c
- IBM PPC405 specific debugger routines.
+ AMCC PPC405 specific debugger routines.
Bedbug support for the MPC860
diff --git a/doc/README.ebony b/doc/README.ebony
index 6e2a8115a4..8b030dbb54 100644
--- a/doc/README.ebony
+++ b/doc/README.ebony
@@ -1,9 +1,9 @@
- IBM Ebony Board
+ AMCC Ebony Board
Last Update: September 12, 2002
=======================================================================
-This file contains some handy info regarding U-Boot and the IBM
+This file contains some handy info regarding U-Boot and the AMCC
Ebony evalutation board. See the README.ppc440 for additional
information.
diff --git a/doc/README.ml300 b/doc/README.ml300
index c9ef6e6c81..27c5b92783 100644
--- a/doc/README.ml300
+++ b/doc/README.ml300
@@ -5,7 +5,7 @@ Xilinx ML300 platform
---------------
The Xilinx ML300 board is based on the Virtex-II Pro FPGA with
-integrated IBM PowerPC 405 core. The board is normally booted from
+integrated AMCC PowerPC 405 core. The board is normally booted from
System ACE CF. U-Boot is then run out of main memory.
An FPGA is a configurable and thus very flexible device. To
diff --git a/doc/README.mpc85xxads b/doc/README.mpc85xxads
index 08d6831fb6..f0cf782a8f 100644
--- a/doc/README.mpc85xxads
+++ b/doc/README.mpc85xxads
@@ -130,7 +130,7 @@ Updated 13-July-2004 Jon Loeliger
include/configs/MPC8540ADS.h
include/configs/MPC8560ADS.h
- CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, IBM 440, etc)
+ CONFIG_BOOKE BOOKE(e.g. Motorola MPC85xx, AMCC 440, etc)
CONFIG_E500 BOOKE e500 family(Motorola)
CONFIG_MPC85xx MPC8540,MPC8560 and their derivatives
CONFIG_MPC8540 MPC8540 specific
diff --git a/doc/README.ocotea b/doc/README.ocotea
index 403735d0f3..9ac3a184cb 100644
--- a/doc/README.ocotea
+++ b/doc/README.ocotea
@@ -1,9 +1,9 @@
- IBM Ocotea Board
+ AMCC Ocotea Board
Last Update: March 2, 2004
=======================================================================
-This file contains some handy info regarding U-Boot and the IBM
+This file contains some handy info regarding U-Boot and the AMCC
Ocotea 440gx evalutation board. See the README.ppc440 for additional
information.
@@ -53,7 +53,7 @@ Special note about the Cicada CIS8201:
This has been done in the 440gx_enet.c file with a #ifdef/endif
pair.
-IBM does not store the EMAC ethernet addresses within their PIBS bootloader.
+AMCC does not store the EMAC ethernet addresses within their PIBS bootloader.
The addresses contained in the config header file are from my particular
board and you _*should*_ change them to reflect your board either in the
config file and/or in your environment variables. I found the addresses on
diff --git a/doc/README.ocotea-PIBS-to-U-Boot b/doc/README.ocotea-PIBS-to-U-Boot
index 0044aa0f91..25dd2a2378 100644
--- a/doc/README.ocotea-PIBS-to-U-Boot
+++ b/doc/README.ocotea-PIBS-to-U-Boot
@@ -75,8 +75,8 @@ powering the board you should see the following message:
U-Boot 1.1.3 (Apr 5 2005 - 22:59:57)
-IBM PowerPC 440 GX Rev. C
-Board: IBM 440GX Evaluation Board
+AMCC PowerPC 440 GX Rev. C
+Board: AMCC 440GX Evaluation Board
VCO: 1066 MHz
CPU: 533 MHz
PLB: 152 MHz
diff --git a/doc/README.ppc440 b/doc/README.ppc440
index 95d63fc508..08f34f589f 100644
--- a/doc/README.ppc440
+++ b/doc/README.ppc440
@@ -12,7 +12,7 @@ and enabled via the CONFIG_440 flag. It is largely based on the
405gp code. A sample board support implementation is contained
in the board/ebony directory.
-All testing was performed using the IBM Ebony board using both
+All testing was performed using the AMCC Ebony board using both
Rev B and Rev C silicon. However, since the Rev B. silicon has
extensive errata, support for Rev B. is minimal (it boots, and
features such as i2c, pci, tftpboot, etc. seem to work ok).
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