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authorStefan Roese <sr@denx.de>2009-02-23 16:42:51 +0100
committerWolfgang Denk <wd@denx.de>2009-03-20 22:39:14 +0100
commit9cd690160d3ce1a7fb4ceeee6c99cedb1ac1d49c (patch)
tree8370df0df2b2bff09e5c5180ecb8da423fb23131 /cpu
parentbb57ad4be76d0e2e7f9ec56678235cc9872ff40f (diff)
downloadtalos-obmc-uboot-9cd690160d3ce1a7fb4ceeee6c99cedb1ac1d49c.tar.gz
talos-obmc-uboot-9cd690160d3ce1a7fb4ceeee6c99cedb1ac1d49c.zip
ppc4xx: Don't write the MAC address into the internal SoC registers
Remove this code. It's not needed. The 4xx EMAC driver stores the MAC addresses into the SoC registers instead. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu')
-rw-r--r--cpu/ppc4xx/cpu_init.c29
1 files changed, 1 insertions, 28 deletions
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index a8f589a9f1..577d33fead 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -321,35 +321,9 @@ cpu_init_f (void)
*/
int cpu_init_r (void)
{
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
- bd_t *bd = gd->bd;
- unsigned long reg;
- uchar enetaddr[6];
#if defined(CONFIG_405GP)
uint pvr = get_pvr();
-#endif
-
- /*
- * Write Ethernetaddress into on-chip register
- */
- reg = 0x00000000;
- eth_getenv_enetaddr("ethaddr", enetaddr);
- reg |= enetaddr[0]; /* set high address */
- reg = reg << 8;
- reg |= enetaddr[1];
- out32 (EMAC_IAH, reg);
-
- reg = 0x00000000;
- reg |= enetaddr[2]; /* set low address */
- reg = reg << 8;
- reg |= enetaddr[3];
- reg = reg << 8;
- reg |= enetaddr[4];
- reg = reg << 8;
- reg |= enetaddr[5];
- out32 (EMAC_IAL, reg);
-#if defined(CONFIG_405GP)
/*
* Set edge conditioning circuitry on PPC405GPr
* for compatibility to existing PPC405GP designs.
@@ -358,7 +332,6 @@ int cpu_init_r (void)
mtdcr(ecr, 0x60606000);
}
#endif /* defined(CONFIG_405GP) */
-#endif /* defined(CONFIG_405GP) || defined(CONFIG_405EP) */
- return (0);
+ return 0;
}
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