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| author | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:39:26 -0700 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-04-13 09:39:26 -0700 |
| commit | 8258b6e2f57f73b4cacda1ca513385d70f808777 (patch) | |
| tree | 2d9ee7f55381f733e7e9a031172349cc9de4c46b /cpu | |
| parent | 643de569b25ab0b8cbd77604491efeacf4ec13c2 (diff) | |
| parent | 3f9c542d3d69b1a10a5e193e779133a0454d1f44 (diff) | |
| download | talos-obmc-uboot-8258b6e2f57f73b4cacda1ca513385d70f808777.tar.gz talos-obmc-uboot-8258b6e2f57f73b4cacda1ca513385d70f808777.zip | |
Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc83xx/spd_sdram.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c index 97ac7bb3d9..70cd410298 100644 --- a/cpu/mpc83xx/spd_sdram.c +++ b/cpu/mpc83xx/spd_sdram.c @@ -601,7 +601,7 @@ long int spd_sdram() debug("DDR:timing_cfg_2=0x%08x\n", ddr->timing_cfg_2); /* Check DIMM data bus width */ - if (spd.dataw_lsb == 0x20) { + if (spd.dataw_lsb < 64) { if (spd.mem_type == SPD_MEMTYPE_DDR) burstlen = 0x03; /* 32 bit data bus, burst len is 8 */ else @@ -763,7 +763,7 @@ long int spd_sdram() sdram_cfg |= SDRAM_CFG_RD_EN; /* The DIMM is 32bit width */ - if (spd.dataw_lsb == 0x20) { + if (spd.dataw_lsb < 64) { if (spd.mem_type == SPD_MEMTYPE_DDR) sdram_cfg |= SDRAM_CFG_32_BE | SDRAM_CFG_8_BE; if (spd.mem_type == SPD_MEMTYPE_DDR2) |
