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authorBecky Bruce <becky.bruce@freescale.com>2008-06-09 16:03:40 -0500
committerWolfgang Denk <wd@denx.de>2008-06-12 08:50:18 +0200
commit9973e3c614721bbf169882ffc3be266a6611cd60 (patch)
tree01ca6844089d2ea999566aa558acea50a9e606a1 /cpu/ppc4xx
parent391fd93ab23e15ab3dd58a54f5b609024009c378 (diff)
downloadtalos-obmc-uboot-9973e3c614721bbf169882ffc3be266a6611cd60.tar.gz
talos-obmc-uboot-9973e3c614721bbf169882ffc3be266a6611cd60.zip
Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Diffstat (limited to 'cpu/ppc4xx')
-rw-r--r--cpu/ppc4xx/44x_spd_ddr2.c4
-rw-r--r--cpu/ppc4xx/denali_spd_ddr2.c2
-rw-r--r--cpu/ppc4xx/sdram.c4
3 files changed, 5 insertions, 5 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 521491820d..c28fc463b5 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -389,7 +389,7 @@ static unsigned long sdram_memsize(void)
* banks appropriately. If Auto Memory Configuration is
* not used, it is assumed that no DIMM is plugged
*-----------------------------------------------------------------------------*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
unsigned char spd0[MAX_SPD_BYTES];
@@ -3081,7 +3081,7 @@ static void ppc440sp_sdram_register_dump(void)
* banks. The configuration is performed using static, compile-
* time parameters.
*---------------------------------------------------------------------------*/
-long initdram(int board_type)
+phys_size_t initdram(int board_type)
{
/*
* Only run this SDRAM init code once. For NAND booting
diff --git a/cpu/ppc4xx/denali_spd_ddr2.c b/cpu/ppc4xx/denali_spd_ddr2.c
index ad805b937b..3bd637567c 100644
--- a/cpu/ppc4xx/denali_spd_ddr2.c
+++ b/cpu/ppc4xx/denali_spd_ddr2.c
@@ -1022,7 +1022,7 @@ static void program_ddr0_44(unsigned long dimm_ranks[],
* banks appropriately. If Auto Memory Configuration is
* not used, it is assumed that no DIMM is plugged
*-----------------------------------------------------------------------------*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
unsigned char const iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
unsigned long dimm_ranks[MAXDIMMS];
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index c7771addaa..7d60ad667f 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -164,7 +164,7 @@ static ulong compute_rtr(ulong speed, ulong rows, ulong refresh)
/*
* Autodetect onboard SDRAM on 405 platforms
*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
ulong speed;
ulong sdtr1;
@@ -346,7 +346,7 @@ static void sdram_tr1_set(int ram_address, int* tr1_value)
* so this should be extended for other future boards
* using this routine!
*/
-long int initdram(int board_type)
+phys_size_t initdram(int board_type)
{
int i;
int tr1_bank1;
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