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author | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-08-21 11:05:03 +0200 |
commit | f556483734126793522fb7a8cf36af90da78f084 (patch) | |
tree | c872485b1c83e4c941ad674487a4e60acc6881ae /cpu/ppc4xx/44x_spd_ddr2.c | |
parent | 079589bcfb24ba11068460276a3cc9549ab5346f (diff) | |
download | talos-obmc-uboot-f556483734126793522fb7a8cf36af90da78f084.tar.gz talos-obmc-uboot-f556483734126793522fb7a8cf36af90da78f084.zip |
ppc4xx: Cleanup of "ppc4xx: Optimize PLB4 Arbiter..." patch
This patch fixes some minor issues introduced with the patch:
ppc4xx: Optimize PLB4 Arbiter... from Prodyut Hazarika:
- Rework memory-queue and PLB arbiter optimization code, that the
local variable is not needed anymore. This removes one #ifdef.
- Use consistant spacing in ppc4xx.h header (XXX + 0x01 instead
of XXX+ 0x01). This was not introduced by Prodyut, just a
copy-paste problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/44x_spd_ddr2.c')
-rw-r--r-- | cpu/ppc4xx/44x_spd_ddr2.c | 20 |
1 files changed, 5 insertions, 15 deletions
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index c7ed161fde..001f2c1d3a 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -2172,11 +2172,6 @@ static void program_memory_queue(unsigned long *dimm_populated, unsigned long i; unsigned long bank_0_populated = 0; phys_size_t total_size = 0; -#if defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ - defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ - defined(CONFIG_460SX) - unsigned long val; -#endif /*------------------------------------------------------------------ * Reset the rank_base_address. @@ -2257,7 +2252,6 @@ static void program_memory_queue(unsigned long *dimm_populated, #if defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT) || \ defined(CONFIG_460SX) - /* * Enable high bandwidth access * This is currently not used, but with this setup @@ -2270,15 +2264,11 @@ static void program_memory_queue(unsigned long *dimm_populated, /* * Set optimal value for Memory Queue HB/LL Configuration registers */ - - val = (mfdcr(SDRAM_CONF1HB) | SDRAM_CONF1HB_AAFR | SDRAM_CONF1HB_RPEN | SDRAM_CONF1HB_RFTE); - mtdcr(SDRAM_CONF1HB, val); - - val = (mfdcr(SDRAM_CONF1LL) | SDRAM_CONF1LL_AAFR | SDRAM_CONF1LL_RPEN | SDRAM_CONF1LL_RFTE); - mtdcr(SDRAM_CONF1LL, val); - - val = (mfdcr(SDRAM_CONFPATHB) | SDRAM_CONFPATHB_TPEN); - mtdcr(SDRAM_CONFPATHB, val); + mtdcr(SDRAM_CONF1HB, mfdcr(SDRAM_CONF1HB) | SDRAM_CONF1HB_AAFR | + SDRAM_CONF1HB_RPEN | SDRAM_CONF1HB_RFTE); + mtdcr(SDRAM_CONF1LL, mfdcr(SDRAM_CONF1LL) | SDRAM_CONF1LL_AAFR | + SDRAM_CONF1LL_RPEN | SDRAM_CONF1LL_RFTE); + mtdcr(SDRAM_CONFPATHB, mfdcr(SDRAM_CONFPATHB) | SDRAM_CONFPATHB_TPEN); #endif } |