diff options
| author | Dave Liu <daveliu@freescale.com> | 2008-12-16 12:09:27 +0800 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-12-19 18:32:48 -0600 |
| commit | f51f07eb58fad12de9294ba4ee6c09a0ddeaee03 (patch) | |
| tree | 72add91fbdc012d5a449748ca2cd2e698fa10e63 /cpu/mpc86xx | |
| parent | 58da8890d5fbd074746037722a423de9ac408616 (diff) | |
| download | talos-obmc-uboot-f51f07eb58fad12de9294ba4ee6c09a0ddeaee03.tar.gz talos-obmc-uboot-f51f07eb58fad12de9294ba4ee6c09a0ddeaee03.zip | |
85xx: Fix the boot window issue
If one custom board is using the 8MB flash, it is set
as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000.
The current start.S code will be broken at switch_as.
It is because the TLB1[15] is set as 16MB page size,
EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000.
For the 8MB flash case, the EPN = 0xefxxxxxx,
RPN = 0xffxxxxxx. Assume the virt address of switch_as
is 0xef7ff18c, the real address of the instruction at
switch_as should be 0xff7ff18c. the 0xff7ff18c is out
of the range of the default 8MB boot LAW window
0xff800000 - 0xffffffff.
So when we switch to AS1 address space at switch_as,
the core can't fetch the instruction at switch_as any
more. It will cause broken issue.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'cpu/mpc86xx')
0 files changed, 0 insertions, 0 deletions
