* Code cleanup:

  - remove trailing white space, trailing empty lines, C++ comments, etc.
  - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

* Patches by Kenneth Johansson, 25 Jun 2003:
  - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)

9 files changed, 88 insertions, 99 deletions

diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S
index 55daa89e72..01fbb2fe3e 100644
--- a/cpu/mips/cache.S
+++ b/cpu/mips/cache.S
@@ -150,7 +150,7 @@ mips_cache_reset:
 	sw	zero, 28(a0)
 	addu	a0, 32
 	bltu	a0, a1, 2b
-   
+
 	/* Set invalid tag.
 	 */
 
@@ -267,4 +267,3 @@ mips_cache_lock:
 
 	j	ra
 	.end	mips_cache_lock
-
diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk
index 4ea66172d1..1664e14bc0 100644
--- a/cpu/mips/config.mk
+++ b/cpu/mips/config.mk
@@ -22,4 +22,3 @@
 #
 
 PLATFORM_CPPFLAGS += -mcpu=4kc -EB -mabicalls
-
diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c
index e9676c1288..c27abbdd11 100644
--- a/cpu/mips/cpu.c
+++ b/cpu/mips/cpu.c
@@ -42,4 +42,3 @@ void flush_cache (ulong start_addr, ulong size)
 {
 
 }
-
diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c
index 7fc6eb0351..27f0609664 100644
--- a/cpu/mips/incaip_clock.c
+++ b/cpu/mips/incaip_clock.c
@@ -25,14 +25,13 @@
 #include <asm/inca-ip.h>
 
 
-
 /*******************************************************************************
 *
-* get_cpuclk - returns the frequency of the CPU. 
+* get_cpuclk - returns the frequency of the CPU.
 *
 * Gets the value directly from the INCA-IP hardware.
 *
-* RETURNS: 
+* RETURNS:
 *          150.000.000 for 150 MHz
 *          130.000.000. for 130 Mhz
 *          100.000.000. for 100 Mhz
@@ -55,24 +54,24 @@ uint incaip_get_cpuclk(void)
    else
    {
       /* MUX I set to 100/133 MHz clock */
-      if (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0x40) 
+      if (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0x40)
       {
-         /* Division value is 1/3, maximum CPU operating */
-         /* frequency is 133.3 MHz                       */
-         return 130000000;
+	 /* Division value is 1/3, maximum CPU operating */
+	 /* frequency is 133.3 MHz                       */
+	 return 130000000;
       }
       else
       {
-         /* Division value is 1/4, maximum CPU operating */
-         /* frequency is 100 MHz                         */
-         return 100000000;
+	 /* Division value is 1/4, maximum CPU operating */
+	 /* frequency is 100 MHz                         */
+	 return 100000000;
       }
    }
 }
 
 /*******************************************************************************
 *
-* get_fpiclk - returns the frequency of the FPI bus. 
+* get_fpiclk - returns the frequency of the FPI bus.
 *
 * Gets the value directly from the INCA-IP hardware.
 *
@@ -82,26 +81,24 @@ uint incaip_get_cpuclk(void)
 *   This functions should be used by the hardware driver to get the correct
 *   frequency of the CPU. Don't use the macros, which are set to init the CPU
 *   frequency in the ROM code.
-*   The calculation for the 
+*   The calculation for the
 */
 uint incaip_get_fpiclk(void)
 {
    uint  clkCPU;
-   
+
    clkCPU = incaip_get_cpuclk();
-   
+
    switch (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0xC)
    {
       case 0x4:
-         return clkCPU >> 1; /* devided by 2 */
-         break;
+	 return clkCPU >> 1; /* devided by 2 */
+	 break;
       case 0x8:
-         return clkCPU >> 2; /* devided by 4 */
-         break;
+	 return clkCPU >> 2; /* devided by 4 */
+	 break;
       default:
-         return clkCPU;
-         break;
+	 return clkCPU;
+	 break;
    }
 }
-
-
diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S
index 9455569f52..71adaa19de 100644
--- a/cpu/mips/incaip_wdt.S
+++ b/cpu/mips/incaip_wdt.S
@@ -70,4 +70,3 @@ disable_incaip_wdt:
 
 	j	ra
 	nop
-
diff --git a/cpu/mips/interrupts.c b/cpu/mips/interrupts.c
index 0490a7661a..87f7a9f7e6 100644
--- a/cpu/mips/interrupts.c
+++ b/cpu/mips/interrupts.c
@@ -31,4 +31,3 @@ int disable_interrupts(void)
 {
 	return 0;
 }
-
diff --git a/cpu/mips/serial.c b/cpu/mips/serial.c
index b26f41d0c8..585227ad68 100644
--- a/cpu/mips/serial.c
+++ b/cpu/mips/serial.c
@@ -23,7 +23,7 @@
 #define TOUT_LOOP	100000
 
 /* Set base address for second FPI interrupt control register bank */
-#define SFPI_INTCON_BASEADDR	0xBF0F0000 
+#define SFPI_INTCON_BASEADDR	0xBF0F0000
 
 /* Register offset from base address */
 #define FBS_ISR		0x00000000	/* Interrupt status register */
@@ -75,11 +75,11 @@ int serial_init (void)
     /* we have to set PMU.EN13 bit to enable an ASC device*/
     INCAASC_PMU_ENABLE(13);
 #endif
-    
+
     /* and we have to set CLC register*/
     CLEAR_BIT(pAsc->asc_clc, ASCCLC_DISS);
     SET_BITFIELD(pAsc->asc_clc, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 0x0001);
-    
+
     /* initialy we are in async mode */
     pAsc->asc_con = ASCCON_M_8ASYNC;
 
@@ -89,13 +89,13 @@ int serial_init (void)
 #ifdef ASC_FIFO_PRESENT
     /* TXFIFO's filling level */
     SET_BITFIELD(pAsc->asc_txfcon, ASCTXFCON_TXFITLMASK,
-                    ASCTXFCON_TXFITLOFF, INCAASC_TXFIFO_FL);
+		    ASCTXFCON_TXFITLOFF, INCAASC_TXFIFO_FL);
     /* enable TXFIFO */
     SET_BIT(pAsc->asc_txfcon, ASCTXFCON_TXFEN);
 
     /* RXFIFO's filling level */
-    SET_BITFIELD(pAsc->asc_txfcon, ASCRXFCON_RXFITLMASK, 
-                    ASCRXFCON_RXFITLOFF, INCAASC_RXFIFO_FL);
+    SET_BITFIELD(pAsc->asc_txfcon, ASCRXFCON_RXFITLMASK,
+		    ASCRXFCON_RXFITLOFF, INCAASC_RXFIFO_FL);
     /* enable RXFIFO */
     SET_BIT(pAsc->asc_rxfcon, ASCRXFCON_RXFEN);
 #endif
@@ -123,7 +123,7 @@ int serial_init (void)
 
     /* set the options */
     serial_setopt();
-    
+
     return 0;
 }
 
@@ -141,25 +141,25 @@ void serial_setbrg (void)
 #ifndef INCAASC_USE_FDV
     fdv = 2;
     uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1;
-#else 
+#else
     fdv = INCAASC_FDV_HIGH_BAUDRATE;
     uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1;
 #endif /* INCAASC_USE_FDV */
-    
+
     if ( (uiReloadValue < 0) || (uiReloadValue > 8191) )
     {
 #ifndef INCAASC_USE_FDV
-        fdv = 3;
-        uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1;
-#else 
-        fdv = INCAASC_FDV_LOW_BAUDRATE;
-        uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1;
+	fdv = 3;
+	uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1;
+#else
+	fdv = INCAASC_FDV_LOW_BAUDRATE;
+	uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1;
 #endif /* INCAASC_USE_FDV */
-        
-        if ( (uiReloadValue < 0) || (uiReloadValue > 8191) )
-        {
-            return;    /* can't impossibly generate that baud rate */
-        }
+
+	if ( (uiReloadValue < 0) || (uiReloadValue > 8191) )
+	{
+	    return;    /* can't impossibly generate that baud rate */
+	}
     }
 
     /* Disable Baud Rate Generator; BG should only be written when R=0 */
@@ -174,9 +174,9 @@ void serial_setbrg (void)
     CLEAR_BIT(pAsc->asc_con, ASCCON_FDE);
 
     if ( fdv == 2 )
-        CLEAR_BIT(pAsc->asc_con, ASCCON_BRS);   /* BRS = 0 */
+	CLEAR_BIT(pAsc->asc_con, ASCCON_BRS);   /* BRS = 0 */
     else
-        SET_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 1 */
+	SET_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 1 */
 
 #else /* INCAASC_USE_FDV */
 
@@ -217,42 +217,42 @@ static int serial_setopt (void)
     {
     /* 7-bit-data */
     case ASCOPT_CS7:
-        con = ASCCON_M_7ASYNCPAR;   /* 7-bit-data and parity bit */
-        break;
+	con = ASCCON_M_7ASYNCPAR;   /* 7-bit-data and parity bit */
+	break;
 
     /* 8-bit-data */
     case ASCOPT_CS8:
-        if ( ASC_OPTIONS & ASCOPT_PARENB )
-            con = ASCCON_M_8ASYNCPAR;   /* 8-bit-data and parity bit */
-        else
-            con = ASCCON_M_8ASYNC;      /* 8-bit-data no parity */
-        break;
-    
-    /* 
+	if ( ASC_OPTIONS & ASCOPT_PARENB )
+	    con = ASCCON_M_8ASYNCPAR;   /* 8-bit-data and parity bit */
+	else
+	    con = ASCCON_M_8ASYNC;      /* 8-bit-data no parity */
+	break;
+
+    /*
      *  only 7 and 8-bit frames are supported
-     *  if we don't use IOCTL extensions 
+     *  if we don't use IOCTL extensions
      */
     default:
-        return -1;
+	return -1;
     }
 
     if ( ASC_OPTIONS & ASCOPT_STOPB )
-        SET_BIT(con, ASCCON_STP);       /* 2 stop bits */
+	SET_BIT(con, ASCCON_STP);       /* 2 stop bits */
     else
-        CLEAR_BIT(con, ASCCON_STP);     /* 1 stop bit */
+	CLEAR_BIT(con, ASCCON_STP);     /* 1 stop bit */
 
     if ( ASC_OPTIONS & ASCOPT_PARENB )
-        SET_BIT(con, ASCCON_PEN);           /* enable parity checking */    
+	SET_BIT(con, ASCCON_PEN);           /* enable parity checking */
     else
-        CLEAR_BIT(con, ASCCON_PEN);         /* disable parity checking */
-    
+	CLEAR_BIT(con, ASCCON_PEN);         /* disable parity checking */
+
     if ( ASC_OPTIONS & ASCOPT_PARODD )
-        SET_BIT(con, ASCCON_ODD);       /* odd parity */
+	SET_BIT(con, ASCCON_ODD);       /* odd parity */
     else
-        CLEAR_BIT(con, ASCCON_ODD);     /* even parity */
+	CLEAR_BIT(con, ASCCON_ODD);     /* even parity */
 
     if ( ASC_OPTIONS & ASCOPT_CREAD )
-        SET_BIT(pAsc->asc_whbcon, ASCWHBCON_SETREN); /* Receiver enable */
+	SET_BIT(pAsc->asc_whbcon, ASCWHBCON_SETREN); /* Receiver enable */
 
     pAsc->asc_con |= con;
 
@@ -293,14 +293,14 @@ void serial_putc (const char c)
 
 #ifndef ASC_FIFO_PRESENT
     *(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) = FBS_ISR_AB |
-                                                                 FBS_ISR_AT;
+								 FBS_ISR_AT;
 #endif
-    
+
     /* check for errors */
     if ( pAsc->asc_con & ASCCON_OE )
     {
-        SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE);
-        return;
+	SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE);
+	return;
     }
 }
 
@@ -321,7 +321,7 @@ int serial_getc (void)
 
     symbol_mask =
 	((ASC_OPTIONS & ASCOPT_CSIZE) == ASCOPT_CS7) ? (0x7f) : (0xff);
-    
+
     c = (char)(pAsc->asc_rbuf & symbol_mask);
 
 #ifndef ASC_FIFO_PRESENT
@@ -338,30 +338,30 @@ int serial_tstc (void)
 #ifdef ASC_FIFO_PRESENT
     if ( (pAsc->asc_fstat & ASCFSTAT_RXFFLMASK) == 0 )
     {
-        res = 0;
+	res = 0;
     }
 #else
     if (!(*(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) &
-			    					FBS_ISR_AR))
-    
+								FBS_ISR_AR))
+
     {
-        res = 0;
+	res = 0;
     }
 #endif
     else if ( pAsc->asc_con & ASCCON_FE )
     {
-        SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRFE);
-        res = 0;
+	SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRFE);
+	res = 0;
     }
     else if ( pAsc->asc_con & ASCCON_PE )
     {
-        SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRPE);
-        res = 0;
+	SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRPE);
+	res = 0;
     }
     else if ( pAsc->asc_con & ASCCON_OE )
     {
-        SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE);
-        res = 0;
+	SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE);
+	res = 0;
     }
 
     return res;
diff --git a/cpu/mips/serial.h b/cpu/mips/serial.h
index ee63360e63..7ffdcfaf8b 100644
--- a/cpu/mips/serial.h
+++ b/cpu/mips/serial.h
@@ -24,7 +24,7 @@
 
 #ifdef INCAASC_USE_FDV
    #define INCAASC_FDV_LOW_BAUDRATE        71
-   #define INCAASC_FDV_HIGH_BAUDRATE       453   
+   #define INCAASC_FDV_HIGH_BAUDRATE       453
 #endif /*INCAASC_USE_FDV*/
 
 
@@ -41,7 +41,7 @@
 #define INCAASC_IRQ_LINE_EIR            0x00040000      /* EIR - Err */
 #define INCAASC_IRQ_LINE_TBIR           0x00080000      /* TBIR - Tx Buf*/
 
-/* interrupt controller access macros */    
+/* interrupt controller access macros */
 #define ASC_INTERRUPTS_ENABLE(X)  \
    *((volatile unsigned int*) INCA_IP_ICU_IM2_IER) |= X;
 #define ASC_INTERRUPTS_DISABLE(X) \
@@ -96,9 +96,9 @@
 #define ASCABCON_FCDETEN    0x0010
 #define ASCABCON_EMMASK     0x0300
     #define ASCABCON_EMOFF          8
-        #define ASCABCON_EM_DISAB       0x0
-        #define ASCABCON_EM_DURAB       0x1
-        #define ASCABCON_EM_ALWAYS      0x2
+	#define ASCABCON_EM_DISAB       0x0
+	#define ASCABCON_EM_DURAB       0x1
+	#define ASCABCON_EM_ALWAYS      0x2
 #define ASCABCON_TXINV      0x0400
 #define ASCABCON_RXINV      0x0800
 
@@ -175,4 +175,3 @@ typedef  struct         /* incaAsc_t */
 } incaAsc_t;
 
 #endif /* __INCincaAscSioh */
-
diff --git a/cpu/mips/start.S b/cpu/mips/start.S
index b504393729..12129deed1 100644
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -65,7 +65,7 @@ _start:
 	RVECENT(romReserved,14)
 	RVECENT(romReserved,15)
 	RVECENT(romReserved,16)
-	RVECENT(romReserved,17) 
+	RVECENT(romReserved,17)
 	RVECENT(romReserved,18)
 	RVECENT(romReserved,19)
 	RVECENT(romReserved,20)
@@ -111,7 +111,7 @@ _start:
 	RVECENT(romReserved,60)
 	RVECENT(romReserved,61)
 	RVECENT(romReserved,62)
-	RVECENT(romReserved,63) 
+	RVECENT(romReserved,63)
 	XVECENT(romExcHandle,0x200)	/* bfc00200: R4000 tlbmiss vector */
 	RVECENT(romReserved,65)
 	RVECENT(romReserved,66)
@@ -127,7 +127,7 @@ _start:
 	RVECENT(romReserved,76)
 	RVECENT(romReserved,77)
 	RVECENT(romReserved,78)
-	RVECENT(romReserved,79) 
+	RVECENT(romReserved,79)
 	XVECENT(romExcHandle,0x280)	/* bfc00280: R4000 xtlbmiss vector */
 	RVECENT(romReserved,81)
 	RVECENT(romReserved,82)
@@ -143,7 +143,7 @@ _start:
 	RVECENT(romReserved,92)
 	RVECENT(romReserved,93)
 	RVECENT(romReserved,94)
-	RVECENT(romReserved,95) 
+	RVECENT(romReserved,95)
 	XVECENT(romExcHandle,0x300)	/* bfc00300: R4000 cache vector */
 	RVECENT(romReserved,97)
 	RVECENT(romReserved,98)
@@ -176,7 +176,7 @@ _start:
 	RVECENT(romReserved,125)
 	RVECENT(romReserved,126)
 	RVECENT(romReserved,127)
-   
+
 	/* We hope there are no more reserved vectors!
 	 * 128 * 8 == 1024 == 0x400
 	 * so this is address R_VEC+0x400 == 0xbfc00400
@@ -237,7 +237,7 @@ reset:
 	nop
 #endif
 
-	/* Initialize any external memory. 
+	/* Initialize any external memory.
 	 */
 	bal	memsetup
 	nop
@@ -300,7 +300,7 @@ relocate_code:
 	sub	gp, CFG_MONITOR_BASE
 	add	gp, a2			/* gp now adjusted		*/
 	sub	t6, gp, t6		/* t6 <-- relocation offset	*/
-	
+
 	li	t0, CFG_MONITOR_BASE
 	la	t3, in_ram
 	lw	t2, -12(t3)	/* t2 <-- uboot_end_data	*/
@@ -363,14 +363,13 @@ in_ram:
 1:	addi	t1, 4
 	bltl	t1, t2, 1b
 	sw	zero, 0(t1)	/* delay slot			*/
-	
+
 	move	a0, a1
 	la	t9, board_init_r
 	j	t9
 	move	a1, a2		/* delay slot			*/
 
 	.end	relocate_code
-	
 
 
 	/* Exception handlers.
@@ -380,4 +379,3 @@ romReserved:
 
 romExcHandle:
 	b romExcHandle
-