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authorkevin.morfitt@fearnside-systems.co.uk <kevin.morfitt@fearnside-systems.co.uk>2009-10-10 13:30:22 +0900
committerTom Rix <Tom.Rix@windriver.com>2009-10-13 21:13:56 -0500
commitd67cce2dda3a40c3bd90a6c6e129fbb26dd4cfab (patch)
tree8f063bfb4933c23040fc244182841997df31491f /cpu/arm920t/s3c24x0/usb.c
parentcd85662b345c0c2248fd7637f65bb2fbb4d53dd9 (diff)
downloadtalos-obmc-uboot-d67cce2dda3a40c3bd90a6c6e129fbb26dd4cfab.tar.gz
talos-obmc-uboot-d67cce2dda3a40c3bd90a6c6e129fbb26dd4cfab.zip
Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'cpu/arm920t/s3c24x0/usb.c')
-rw-r--r--cpu/arm920t/s3c24x0/usb.c30
1 files changed, 16 insertions, 14 deletions
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c
index 9ccf575964..b5ba8c4f3a 100644
--- a/cpu/arm920t/s3c24x0/usb.c
+++ b/cpu/arm920t/s3c24x0/usb.c
@@ -32,41 +32,43 @@
# include <s3c2410.h>
#endif
-int usb_cpu_init (void)
-{
+#include <asm/io.h>
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+int usb_cpu_init(void)
+{
+ struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
+ struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
/*
* Set the 48 MHz UPLL clocking. Values are taken from
* "PLL value selection guide", 6-23, s3c2400_UM.pdf.
*/
- clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
- gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
+ writel((40 << 12) + (1 << 4) + 2, &clk_power->UPLLCON);
+ /* 1 = use pads related USB for USB host */
+ writel(readl(&gpio->MISCCR) | 0x8, &gpio->MISCCR);
/*
* Enable USB host clock.
*/
- clk_power->CLKCON |= (1 << 4);
+ writel(readl(&clk_power->CLKCON) | (1 << 4), &clk_power->CLKCON);
return 0;
}
-int usb_cpu_stop (void)
+int usb_cpu_stop(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
/* may not want to do this */
- clk_power->CLKCON &= ~(1 << 4);
+ writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
return 0;
}
-int usb_cpu_init_fail (void)
+int usb_cpu_init_fail(void)
{
- S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
- clk_power->CLKCON &= ~(1 << 4);
+ struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
+ writel(readl(&clk_power->CLKCON) & ~(1 << 4), &clk_power->CLKCON);
return 0;
}
-# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
+# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_SYS_USB_OHCI_CPU_INIT) */
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