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authorYork Sun <yorksun@freescale.com>2013-06-25 11:37:43 -0700
committerYork Sun <yorksun@freescale.com>2013-08-09 12:41:38 -0700
commitf165bc35285460f9739a234de379a535519f39e6 (patch)
treeeaf5957f7e71ed011bed3c490e393723b7b6b5d4 /board
parentbc4804516e9fc75eea59b2d32a6b1de79f6fea6d (diff)
downloadtalos-obmc-uboot-f165bc35285460f9739a234de379a535519f39e6.tar.gz
talos-obmc-uboot-f165bc35285460f9739a234de379a535519f39e6.zip
powerpc/corenet: Move RCW print to cpu.c
The RCW print is common for all corenet platforms. Not necessary to ducplicate in each board file. Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board')
-rw-r--r--board/freescale/b4860qds/b4860qds.c15
-rw-r--r--board/freescale/corenet_ds/corenet_ds.c17
-rw-r--r--board/freescale/p2041rdb/p2041rdb.c15
-rw-r--r--board/freescale/t4qds/t4qds.c14
4 files changed, 3 insertions, 58 deletions
diff --git a/board/freescale/b4860qds/b4860qds.c b/board/freescale/b4860qds/b4860qds.c
index 86e44eae0b..e4f4bfdc5b 100644
--- a/board/freescale/b4860qds/b4860qds.c
+++ b/board/freescale/b4860qds/b4860qds.c
@@ -35,8 +35,6 @@ int checkboard(void)
char buf[64];
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
- unsigned int i;
static const char *const freq[] = {"100", "125", "156.25", "161.13",
"122.88", "122.88", "122.88"};
int clock;
@@ -61,19 +59,6 @@ int checkboard(void)
/* the timestamp string contains "\n" at the end */
printf(" on %s", qixis_read_time(buf));
- /* Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
-
/*
* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index fffb0c817a..60e2100af3 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -27,8 +27,10 @@ int checkboard (void)
{
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) || \
+ defined(CONFIG_P5040DS)
unsigned int i;
+#endif
static const char * const freq[] = {"100", "125", "156.25", "212.5" };
printf("Board: %sDS, ", cpu->name);
@@ -47,19 +49,6 @@ int checkboard (void)
else
printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
- /* Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
-
/* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
* technically be set to force the reference clocks to match the
diff --git a/board/freescale/p2041rdb/p2041rdb.c b/board/freescale/p2041rdb/p2041rdb.c
index 08d10bc9c8..60694a6723 100644
--- a/board/freescale/p2041rdb/p2041rdb.c
+++ b/board/freescale/p2041rdb/p2041rdb.c
@@ -28,7 +28,6 @@ int checkboard(void)
{
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
printf("Board: %sRDB, ", cpu->name);
@@ -39,20 +38,6 @@ int checkboard(void)
printf("vBank: %d\n", sw & 0x1);
/*
- * Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
-
- /*
* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
* technically be set to force the reference clocks to match the
diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index aa6a217f39..fe2a9982a9 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -43,7 +43,6 @@ int checkboard(void)
char buf[64];
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
unsigned int i;
printf("Board: %sQDS, ", cpu->name);
@@ -68,19 +67,6 @@ int checkboard(void)
/* the timestamp string contains "\n" at the end */
printf(" on %s", qixis_read_time(buf));
- /* Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
-
/*
* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
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