Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'

7 files changed, 92 insertions, 131 deletions

diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index 7d9f361a8a..8d7a22765a 100644
--- a/board/nvidia/common/board.c
+++ b/board/nvidia/common/board.c
@@ -132,10 +132,7 @@ int board_init(void)
 	clock_init();
 	clock_verify();
 
-#ifdef CONFIG_SPI_UART_SWITCH
-	gpio_config_uart();
-#endif
-#if defined(CONFIG_TEGRA_SPI) || defined(CONFIG_TEGRA_SLINK)
+#ifdef CONFIG_FDT_SPI
 	pin_mux_spi();
 	spi_init();
 #endif
diff --git a/board/nvidia/common/common.mk b/board/nvidia/common/common.mk
index bd6202c299..d9bcb85401 100644
--- a/board/nvidia/common/common.mk
+++ b/board/nvidia/common/common.mk
@@ -1,4 +1,3 @@
 # common options for all tegra boards
 COBJS-y	+= ../../nvidia/common/board.o
-COBJS-$(CONFIG_SPI_UART_SWITCH) += ../../nvidia/common/uart-spi-switch.o
 COBJS-$(CONFIG_TEGRA_CLOCK_SCALING) += ../../nvidia/common/emc.o
diff --git a/board/nvidia/common/uart-spi-switch.c b/board/nvidia/common/uart-spi-switch.c
deleted file mode 100644
index e9d445d9e2..0000000000
--- a/board/nvidia/common/uart-spi-switch.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (c) 2011 The Chromium OS Authors.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/gpio.h>
-#include <asm/arch/pinmux.h>
-#include <asm/arch/uart-spi-switch.h>
-#include <asm/arch/tegra.h>
-#include <asm/arch-tegra/tegra_spi.h>
-#include <asm/arch-tegra/board.h>
-
-/* position of the UART/SPI select switch */
-enum spi_uart_switch {
-	SWITCH_UNKNOWN,
-	SWITCH_SPI,
-	SWITCH_UART,
-	SWITCH_BOTH
-};
-
-/* Information about the spi/uart switch */
-struct spi_uart {
-	int gpio;                       /* GPIO to control switch */
-	u32 port;                       /* Port number of UART affected */
-};
-
-static struct spi_uart local;
-static enum spi_uart_switch switch_pos; /* Current switch position */
-
-
-static void get_config(struct spi_uart *config)
-{
-#if defined CONFIG_SPI_CORRUPTS_UART
-	config->gpio = CONFIG_UART_DISABLE_GPIO;
-	config->port = CONFIG_SPI_CORRUPTS_UART_NR;
-#else
-	config->gpio = -1;
-#endif
-}
-
-/*
- * Init the UART / SPI switch. This can be called before relocation so we must
- * not access BSS.
- */
-void gpio_early_init_uart(void)
-{
-	struct spi_uart config;
-
-	get_config(&config);
-	if (config.gpio != -1) {
-		/* Cannot provide a label prior to relocation */
-		gpio_request(config.gpio, NULL);
-		gpio_direction_output(config.gpio, 0);
-	}
-}
-
-/*
- * Configure the UART / SPI switch.
- */
-void gpio_config_uart(void)
-{
-	get_config(&local);
-	if (local.gpio != -1) {
-		gpio_direction_output(local.gpio, 0);
-		switch_pos = SWITCH_UART;
-	} else {
-		/*
-		 * If we're here we don't have a SPI switch; go ahead and
-		 * enable the SPI now.  We didn't in spi_init() so we wouldn't
-		 * kill the UART.
-		 */
-		pinmux_set_func(PINGRP_GMC, PMUX_FUNC_SFLASH);
-		switch_pos = SWITCH_BOTH;
-	}
-}
-
-static void spi_uart_switch(struct spi_uart *config,
-			      enum spi_uart_switch new_pos)
-{
-	if (switch_pos == SWITCH_BOTH || new_pos == switch_pos)
-		return;
-
-	/* pre-delay, allow SPI/UART to settle, FIFO to empty, etc. */
-	udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
-
-	/* We need to dynamically change the pinmux, shared w/UART RXD/CTS */
-	pinmux_set_func(PINGRP_GMC, new_pos == SWITCH_SPI ?
-				PMUX_FUNC_SFLASH : PMUX_FUNC_UARTD);
-
-	/*
-	 * On Seaboard, MOSI/MISO are shared w/UART.
-	 * Use GPIO I3 (UART_DISABLE) to tristate UART during SPI activity.
-	 * Enable UART later (cs_deactivate) so we can use it for U-Boot comms.
-	 */
-	gpio_direction_output(config->gpio, new_pos == SWITCH_SPI);
-	switch_pos = new_pos;
-}
-
-void pinmux_select_uart(void)
-{
-		spi_uart_switch(&local, SWITCH_UART);
-}
-
-void pinmux_select_spi(void)
-{
-	spi_uart_switch(&local, SWITCH_SPI);
-}
diff --git a/board/nvidia/dalmore/dalmore.c b/board/nvidia/dalmore/dalmore.c
index 2020a5f00d..2c23a29db7 100644
--- a/board/nvidia/dalmore/dalmore.c
+++ b/board/nvidia/dalmore/dalmore.c
@@ -16,7 +16,12 @@
 
 #include <common.h>
 #include <asm/arch/pinmux.h>
+#include <asm/arch/gp_padctrl.h>
 #include "pinmux-config-dalmore.h"
+#include <i2c.h>
+
+#define BAT_I2C_ADDRESS		0x48	/* TPS65090 charger */
+#define PMU_I2C_ADDRESS		0x58	/* TPS65913 PMU */
 
 /*
  * Routine: pinmux_init
@@ -32,4 +37,65 @@ void pinmux_init(void)
 
 	pinmux_config_table(unused_pins_lowpower,
 		ARRAY_SIZE(unused_pins_lowpower));
+
+	/* Initialize any non-default pad configs (APB_MISC_GP regs) */
+	padgrp_config_table(dalmore_padctrl, ARRAY_SIZE(dalmore_padctrl));
+}
+
+#if defined(CONFIG_TEGRA_MMC)
+/*
+ * Do I2C/PMU writes to bring up SD card bus power
+ *
+ */
+void board_sdmmc_voltage_init(void)
+{
+	uchar reg, data_buffer[1];
+	int ret;
+
+	ret = i2c_set_bus_num(0);/* PMU is on bus 0 */
+	if (ret)
+		printf("%s: i2c_set_bus_num returned %d\n", __func__, ret);
+
+	/* TPS65913: LDO9_VOLTAGE = 3.3V */
+	data_buffer[0] = 0x31;
+	reg = 0x61;
+
+	ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1);
+	if (ret)
+		printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
+			__func__, reg, data_buffer[0], ret);
+
+	/* TPS65913: LDO9_CTRL = Active */
+	data_buffer[0] = 0x01;
+	reg = 0x60;
+
+	ret = i2c_write(PMU_I2C_ADDRESS, reg, 1, data_buffer, 1);
+	if (ret)
+		printf("%s: PMU i2c_write %02X<-%02X returned %d\n",
+			__func__, reg, data_buffer[0], ret);
+
+	/* TPS65090: FET6_CTRL = enable output auto discharge, enable FET6 */
+	data_buffer[0] = 0x03;
+	reg = 0x14;
+
+	ret = i2c_write(BAT_I2C_ADDRESS, reg, 1, data_buffer, 1);
+	if (ret)
+		printf("%s: BAT i2c_write %02X<-%02X returned %d\n",
+			__func__, reg, data_buffer[0], ret);
+}
+
+/*
+ * Routine: pin_mux_mmc
+ * Description: setup the MMC muxes, power rails, etc.
+ */
+void pin_mux_mmc(void)
+{
+	/*
+	 * NOTE: We don't do mmc-specific pin muxes here.
+	 * They were done globally in pinmux_init().
+	 */
+
+	/* Bring up the SDIO3 power rail */
+	board_sdmmc_voltage_init();
 }
+#endif /* MMC */
diff --git a/board/nvidia/dalmore/pinmux-config-dalmore.h b/board/nvidia/dalmore/pinmux-config-dalmore.h
index 3ef6f4eaf6..8c05a1517c 100644
--- a/board/nvidia/dalmore/pinmux-config-dalmore.h
+++ b/board/nvidia/dalmore/pinmux-config-dalmore.h
@@ -361,4 +361,10 @@ static struct pingroup_config tegra114_pinmux_set_nontristate[] = {
 
 	DEFAULT_PINMUX(SDMMC3_CD_N,     SDMMC3, UP,       NORMAL,   INPUT),
 };
+
+static struct padctrl_config dalmore_padctrl[] = {
+	/* (_padgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) */
+	DEFAULT_PADCFG(SDIO3, SDIOCFG_DRVUP_SLWF, SDIOCFG_DRVDN_SLWR, \
+		SDIOCFG_DRVUP, SDIOCFG_DRVDN, NONE, NONE, NONE),
+};
 #endif /* PINMUX_CONFIG_COMMON_H */
diff --git a/board/nvidia/dts/tegra114-dalmore.dts b/board/nvidia/dts/tegra114-dalmore.dts
index 30cf1fb730..86e9459b3a 100644
--- a/board/nvidia/dts/tegra114-dalmore.dts
+++ b/board/nvidia/dts/tegra114-dalmore.dts
@@ -12,6 +12,8 @@
 		i2c2 = "/i2c@7000c400";
 		i2c3 = "/i2c@7000c500";
 		i2c4 = "/i2c@7000c700";
+		sdhci0 = "/sdhci@78000600";
+		sdhci1 = "/sdhci@78000400";
 	};
 
 	memory {
@@ -43,4 +45,20 @@
 		status = "okay";
 		clock-frequency = <400000>;
 	};
+
+	spi@7000da00 {
+		status = "okay";
+		spi-max-frequency = <25000000>;
+	};
+
+	sdhci@78000400 {
+		cd-gpios = <&gpio 170 1>; /* gpio PV2 */
+		bus-width = <4>;
+		status = "okay";
+	};
+
+	sdhci@78000600 {
+		bus-width = <8>;
+		status = "okay";
+	};
 };
diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c
index e581fddf43..498e5137a3 100644
--- a/board/nvidia/seaboard/seaboard.c
+++ b/board/nvidia/seaboard/seaboard.c
@@ -31,7 +31,7 @@
 #include <asm/gpio.h>
 
 /* TODO: Remove this code when the SPI switch is working */
-#if !defined(CONFIG_SPI_UART_SWITCH) && (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
+#if (CONFIG_MACH_TYPE != MACH_TYPE_VENTANA)
 void gpio_early_init_uart(void)
 {
 	/* Enable UART via GPIO_PI3 (port 8, bit 3) so serial console works */