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| author | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
| commit | 85ad184b3b2b0f8af9228477303c55dca1b52ed7 (patch) | |
| tree | 53f6f23530d286249a22e1c65722954421681f27 /board | |
| parent | 135846d6ecaad255ad28d93ebbb78b3d5da68cdc (diff) | |
| download | talos-obmc-uboot-85ad184b3b2b0f8af9228477303c55dca1b52ed7.tar.gz talos-obmc-uboot-85ad184b3b2b0f8af9228477303c55dca1b52ed7.zip | |
ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board')
| -rw-r--r-- | board/netstal/hcu5/sdram.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c index 0b16b50502..6b1b53a4d0 100644 --- a/board/netstal/hcu5/sdram.c +++ b/board/netstal/hcu5/sdram.c @@ -34,11 +34,11 @@ #include <asm/processor.h> #include <asm/io.h> #include <asm/mmu.h> +#include <asm/cache.h> #include <ppc440.h> void hcu_led_set(u32 value); void dcbz_area(u32 start_address, u32 num_bytes); -void dflush(void); #define DDR_DCR_BASE 0x10 #define ddrcfga (DDR_DCR_BASE+0x0) /* DDR configuration address reg */ @@ -185,14 +185,14 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes) #endif sync(); - eieio(); puts(str); /* ECC bit set method for cached memory */ /* Fast method, no noticeable delay */ dcbz_area(start_address, num_bytes); - dflush(); + /* Write modified dcache lines back to memory */ + clean_dcache_range(start_address, start_address + num_bytes); blank_string(strlen(str)); /* Clear error status */ |
