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authorBartlomiej Sieka <tur@semihalf.com>2006-12-28 19:08:21 +0100
committerBartlomiej Sieka <tur@semihalf.com>2006-12-28 19:08:21 +0100
commitcce4acbb68398634b8d011ed7bb0d12269c84230 (patch)
tree843e089c8abea794b1951295b55f93afd4b1d5a4 /board/v38b
parentce3f1a40c507afbab06c5eb58ccdc6713eda3245 (diff)
downloadtalos-obmc-uboot-cce4acbb68398634b8d011ed7bb0d12269c84230.tar.gz
talos-obmc-uboot-cce4acbb68398634b8d011ed7bb0d12269c84230.zip
Few V38B changes:
- fix a typo in V38B config file - move watchdog initialisation earlier in the boot process - add "wdt=off" to default kernel command line (disables kernel watchdog)
Diffstat (limited to 'board/v38b')
-rw-r--r--board/v38b/v38b.c21
1 files changed, 12 insertions, 9 deletions
diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c
index dede996880..ace4aa2cae 100644
--- a/board/v38b/v38b.c
+++ b/board/v38b/v38b.c
@@ -191,16 +191,8 @@ int checkboard (void)
return 0;
}
-
-int board_early_init_r(void)
+int board_early_init_f(void)
{
- /*
- * Now, when we are in RAM, enable flash write access for the
- * detection process. Note that CS_BOOT cannot be cleared when
- * executing in flash.
- */
- *(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
-
#ifdef CONFIG_HW_WATCHDOG
/*
* Enable and configure the direction (output) of PSC3_9 - watchdog
@@ -210,6 +202,17 @@ int board_early_init_r(void)
*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC3_9;
*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC3_9;
#endif /* CONFIG_HW_WATCHDOG */
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+ /*
+ * Now, when we are in RAM, enable flash write access for the
+ * detection process. Note that CS_BOOT cannot be cleared when
+ * executing in flash.
+ */
+ *(vu_long *) MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
/*
* Enable GPIO_WKUP_7 to "read the status of the actual power
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