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authorEgli, Samuel <samuel.egli@siemens.com>2014-04-24 17:57:53 +0200
committerTom Rini <trini@ti.com>2014-05-13 19:42:59 -0400
commit823b2c4ce4b54b658b45055bbc4c79f15789d48c (patch)
tree70a2331302deabfa848a6cb9a427354ff0651e2d /board/siemens/dxr2/board.h
parent9fc2ed40cd32cbb488e7a765e393e6b7ff21c1bc (diff)
downloadtalos-obmc-uboot-823b2c4ce4b54b658b45055bbc4c79f15789d48c.tar.gz
talos-obmc-uboot-823b2c4ce4b54b658b45055bbc4c79f15789d48c.zip
siemens: update DDR3 parameters for dxr2
* add parameters for factory and print them at start up to facilitate control of right DDR3 settings in EEPROM. * cosmetic changes in a couple of printfs Signed-off-by: Samuel Egli <samuel.egli@siemens.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Heiko Schocher <hs@denx.de> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/siemens/dxr2/board.h')
-rw-r--r--board/siemens/dxr2/board.h24
1 files changed, 13 insertions, 11 deletions
diff --git a/board/siemens/dxr2/board.h b/board/siemens/dxr2/board.h
index abf5432329..a59ffb0109 100644
--- a/board/siemens/dxr2/board.h
+++ b/board/siemens/dxr2/board.h
@@ -22,24 +22,26 @@
#define MAGIC_CHIP 0x50494843
/* Automatic generated definition */
-/* Wed, 18 Sep 2013 18:58:27 +0200 */
-/* From file: draco/ddr3-data-micron-v2.txt */
+/* Wed, 16 Apr 2014 16:50:41 +0200 */
+/* From file: draco/ddr3-data-universal-default@303MHz-i0-ES3.txt */
struct ddr3_data {
unsigned int magic; /* 0x33524444 */
- unsigned int version; /* 0x56312e34 */
- unsigned short int ddr3_sratio; /* 0x0100 */
- unsigned short int iclkout; /* 0x0001 */
+ unsigned int version; /* 0x56312e35 */
+ unsigned short int ddr3_sratio; /* 0x0080 */
+ unsigned short int iclkout; /* 0x0000 */
unsigned short int dt0rdsratio0; /* 0x003A */
- unsigned short int dt0wdsratio0; /* 0x008A */
- unsigned short int dt0fwsratio0; /* 0x010B */
- unsigned short int dt0wrsratio0; /* 0x00C4 */
+ unsigned short int dt0wdsratio0; /* 0x003F */
+ unsigned short int dt0fwsratio0; /* 0x009F */
+ unsigned short int dt0wrsratio0; /* 0x0079 */
unsigned int sdram_tim1; /* 0x0888A39B */
unsigned int sdram_tim2; /* 0x26247FDA */
unsigned int sdram_tim3; /* 0x501F821F */
unsigned int emif_ddr_phy_ctlr_1; /* 0x00100206 */
- unsigned int sdram_config; /* 0x61C04AB2 */
- unsigned int ref_ctrl; /* 0x00000618 */
- unsigned int ioctr_val; /* 0x0000018B */
+ unsigned int sdram_config; /* 0x61A44A32 */
+ unsigned int ref_ctrl; /* 0x0000093B */
+ unsigned int ioctr_val; /* 0x0000014A */
+ char manu_name[32]; /* "default@303MHz \0" */
+ char manu_marking[32]; /* "default \0" */
};
struct chip_data {
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