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author | Laurence Withers <lwithers@guralp.com> | 2012-07-30 23:30:35 +0000 |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 14:58:14 +0200 |
commit | 88ac6b9d1402b5a7b639131df95bdd2dbd54d69d (patch) | |
tree | 5842021210e1bded052f7a490a4d9aac58dac473 /board/rpxsuper | |
parent | 8a54aa0da762045938adb706db57c48a1939a81d (diff) | |
download | talos-obmc-uboot-88ac6b9d1402b5a7b639131df95bdd2dbd54d69d.tar.gz talos-obmc-uboot-88ac6b9d1402b5a7b639131df95bdd2dbd54d69d.zip |
DaVinci DA850: UART2 clock ID comes from ASYNC3
On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Diffstat (limited to 'board/rpxsuper')
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