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| author | Stephen Warren <swarren@nvidia.com> | 2015-07-29 13:47:58 -0600 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2015-08-06 10:50:02 -0700 |
| commit | 424afc0a9591796106b2c6f3f812ceaa553bcb32 (patch) | |
| tree | 328577406de3b4124f8d5eb1c508dd405f99d617 /board/nvidia/venice2/pinmux-config-venice2.h | |
| parent | 1264f0f6c6e42c076c8e5767757880140b967f71 (diff) | |
| download | talos-obmc-uboot-424afc0a9591796106b2c6f3f812ceaa553bcb32.tar.gz talos-obmc-uboot-424afc0a9591796106b2c6f3f812ceaa553bcb32.zip | |
ARM: tegra: restrict usable RAM size further
Additionally, ARM64 devices typically run a secure monitor in EL3 and
U-Boot in EL2, and set up some secure RAM carve-outs to contain the EL3
code and data. These carve-outs are located at the top of 32-bit address
space. Restrict U-Boot's RAM usage to well below the location of those
carve-outs. Ideally, we would the secure monitor would inform U-Boot of
exactly which RAM it could use at run-time. However, I'm not sure how to
do that at present (and even if such a mechanism does exist, it would
likely not be generic across all forms of secure monitor).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/venice2/pinmux-config-venice2.h')
0 files changed, 0 insertions, 0 deletions
