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authorSimon Glass <sjg@chromium.org>2011-11-05 04:46:51 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-12-24 10:23:31 +0100
commita04eba99f5a00aff54bef32cafa986830b094532 (patch)
tree22aac2fe25a1a1775b4828f65bae2d8958e0304f /board/nvidia/common/board.h
parent4560c7decc1b13121072621cee9874e042c059b7 (diff)
downloadtalos-obmc-uboot-a04eba99f5a00aff54bef32cafa986830b094532.tar.gz
talos-obmc-uboot-a04eba99f5a00aff54bef32cafa986830b094532.zip
tegra2: Plumb in SPI/UART switch code
On Seaboard the UART and SPI interfere with each other. This causes the UART to receive spurious zero bytes after SPI transactions and also means that SPI can corrupt a few output characters when it starts up if they are still in the UART buffer. This updates the board to use the SPI/UART switch to avoid the problem. For now this feature is turned off since it needs changes to the NS16550 UART to operate. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/nvidia/common/board.h')
-rw-r--r--board/nvidia/common/board.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/board/nvidia/common/board.h b/board/nvidia/common/board.h
index 1f57086602..80fdcbe07a 100644
--- a/board/nvidia/common/board.h
+++ b/board/nvidia/common/board.h
@@ -26,5 +26,6 @@
void gpio_config_uart(void);
int tegra2_mmc_init(int dev_index, int bus_width, int pwr_gpio, int cd_gpio);
+void gpio_early_init_uart(void);
#endif /* BOARD_H */
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