ppc, 8xx: remove obsolete km8xx boards from keymile

The MPC852 based mgsuvd and kmsupx4 boards from keymile
were initially ported but later on not developed further. So
the respective files were removed to avoid unneeded merging
and maintenance.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Heiko Schocher<hs@denx.de>

4 files changed, 0 insertions, 620 deletions

diff --git a/board/keymile/km8xx/Makefile b/board/keymile/km8xx/Makefile
deleted file mode 100644
index abb9ef9724..0000000000
--- a/board/keymile/km8xx/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2007
-# Heiko Schocher, DENX Software Engineering, hs@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-endif
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS	= $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
-		km8xx_hdlc_enet.o
-
-SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/keymile/km8xx/km8xx.c b/board/keymile/km8xx/km8xx.c
deleted file mode 100644
index 6de2f22067..0000000000
--- a/board/keymile/km8xx/km8xx.c
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
- * (C) Copyright 2007
- * Heiko Schocher, DENX Software Engineering, hs@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-#include <common.h>
-#include <mpc8xx.h>
-#include <net.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
-#endif
-
-#include "../common/common.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-const uint sdram_table[] =
-{
-	0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x0ff77c00,
-	0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x08 Burst Read */
-	0x0f07fc04, 0x0ffffc04, 0x00bdfc04, 0x00fffc00,
-	0x00fffc00, 0x00fffc00, 0x0ff77c00, 0x1ffffc05,
-	/* 0x10 Load mode register */
-	0x0ffffc34, 0x0ff57c04, 0x0ffffc04, 0x1ffffc05,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x18 Single Write */
-	0x0f07fc04, 0x0ffffc00, 0x00bd7c04, 0x0ffffc04,
-	0x0ff77c04, 0x1ffffc05, 0xfffffc04, 0xfffffc04,
-	/* 0x20 Burst Write */
-	0x0f07fc04, 0x0ffffc00, 0x00bd7c00, 0x00fffc00,
-	0x00fffc00, 0x00fffc04, 0x0ffffc04, 0x0ff77c04,
-	0x1ffffc05, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x30 Precharge all and Refresh */
-	0x0ff77c04, 0x0ffffc04, 0x0ff5fc84, 0x0ffffc04,
-	0x0ffffc04, 0x0ffffc84, 0x1ffffc05, 0xfffffc04,
-	0xfffffc04, 0xfffffc04, 0xfffffc04, 0xfffffc04,
-	/* 0x3C Exception */
-	0x7ffffc04, 0xfffffc07, 0xfffffc04, 0xfffffc04,
-};
-
-int checkboard (void)
-{
-	puts ("Board: Keymile ");
-#if defined(CONFIG_KMSUPX4)
-	puts ("kmsupx4");
-#else
-	puts ("mgsuvd");
-#endif
-	if (ethernet_present ())
-		puts (" with PIGGY.");
-	puts ("\n");
-	return (0);
-}
-
-phys_size_t initdram (int board_type)
-{
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
-	volatile memctl8xx_t *memctl = &immap->im_memctl;
-	long int size;
-
-	upmconfig (UPMB, (uint *) sdram_table,
-			   sizeof (sdram_table) / sizeof (uint));
-
-	/*
-	 * Preliminary prescaler for refresh (depends on number of
-	 * banks): This value is selected for four cycles every 62.4 us
-	 * with two SDRAM banks or four cycles every 31.2 us with one
-	 * bank. It will be adjusted after memory sizing.
-	 */
-	memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
-	/*
-	 * The following value is used as an address (i.e. opcode) for
-	 * the LOAD MODE REGISTER COMMAND during SDRAM initialisation. If
-	 * the port size is 32bit the SDRAM does NOT "see" the lower two
-	 * address lines, i.e. mar=0x00000088 -> opcode=0x00000022 for
-	 * MICRON SDRAMs:
-	 * ->    0 00 010 0 010
-	 *       |  |   | |   +- Burst Length = 4
-	 *       |  |   | +----- Burst Type   = Sequential
-	 *       |  |   +------- CAS Latency  = 2
-	 *       |  +----------- Operating Mode = Standard
-	 *       +-------------- Write Burst Mode = Programmed Burst Length
-	 */
-	memctl->memc_mar = CONFIG_SYS_MAR;
-
-	/*
-	 * Map controller banks 1 to the SDRAM banks 1 at
-	 * preliminary addresses - these have to be modified after the
-	 * SDRAM size has been determined.
-	 */
-	memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
-	memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
-
-	memctl->memc_mbmr = CONFIG_SYS_MBMR & (~(MBMR_PTBE));	/* no refresh yet */
-
-	udelay (200);
-
-	/* perform SDRAM initializsation sequence */
-
-	memctl->memc_mcr = 0x80802830;	/* SDRAM bank 0 */
-	udelay (1);
-	memctl->memc_mcr = 0x80802110;	/* SDRAM bank 0 - execute twice */
-	udelay (1);
-
-	memctl->memc_mbmr |= MBMR_PTBE;	/* enable refresh */
-
-	udelay (1000);
-
-	/*
-	 * Check Bank 0 Memory Size for re-configuration
-	 *
-	 */
-	size =  get_ram_size(SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE);
-
-	udelay (1000);
-
-	debug ("SDRAM Bank 0: %ld MB\n", size >> 20);
-
-	return (size);
-}
-
-/*
- * Early board initalization.
- */
-int board_early_init_r(void)
-{
-	/* setup the UPIOx */
-	/* General Unit Reset disabled, Flash Bank enabled, UnitLed on */
-	out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x02), 0xc2);
-	/* SCC4 enable, halfduplex, FCC1 powerdown, ANDI enable*/
-	out_8((u8 *)(CONFIG_SYS_PIGGY_BASE + 0x03), 0x35);
-	return 0;
-}
-
-int hush_init_var (void)
-{
-	ivm_read_eeprom ();
-	return 0;
-}
-
-#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
-/*
- * update "brg" property in the blob
- */
-void ft_blob_update (void *blob, bd_t *bd)
-{
-	ulong brg_data[1] = {0};
-
-	/* BRG */
-	brg_data[0] = cpu_to_be32 (bd->bi_busfreq);
-	fdt_set_node_and_value (blob, "/soc/cpm", "brg-frequency", brg_data,
-				sizeof (brg_data));
-
-	/* MAC adr */
-	fdt_set_node_and_value (blob, "/soc/cpm/ethernet", "mac-address",
-				bd->bi_enetaddr, sizeof (u8) * 6);
-}
-
-void ft_board_setup(void *blob, bd_t *bd)
-{
-	ft_cpu_setup (blob, bd);
-	ft_blob_update (blob, bd);
-}
-#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
-
-int i2c_soft_read_pin (void)
-{
-	int val;
-
-	*(unsigned short *)(I2C_BASE_DIR) &=  ~SDA_CONF;
-	udelay(1);
-	val = *(unsigned char *)(I2C_BASE_PORT);
-
-	return ((val & SDA_BIT) == SDA_BIT);
-}
diff --git a/board/keymile/km8xx/km8xx_hdlc_enet.c b/board/keymile/km8xx/km8xx_hdlc_enet.c
deleted file mode 100644
index ca00576925..0000000000
--- a/board/keymile/km8xx/km8xx_hdlc_enet.c
+++ /dev/null
@@ -1,278 +0,0 @@
-/*
- * (C) Copyright 2008
- * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
- *
- * Based in part on arch/powerpc/cpu/mpc8xx/scc.c.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>	/* commproc.h is included here */
-#include <malloc.h>
-#include <net.h>
-
-#ifdef CONFIG_KEYMILE_HDLC_ENET
-
-#include "../common/keymile_hdlc_enet.h"
-
-char keymile_slot;	/* our slot number in the backplane */
-
-/*
- * Since, except during initialization, ethact is always HDLC
- * while we're in the driver, just use serial_printf() everywhere for
- * output.  This avoids possible conflicts when netconsole is being
- * used.
- */
-#define dprintf(fmt, args...)	serial_printf(fmt, ##args)
-
-static int already_inited;
-
-/*
-  * SCC Ethernet Tx and Rx buffer descriptors allocated at the
-  *  immr->udata_bd address on Dual-Port RAM
-  * Provide for Double Buffering
-  */
-typedef volatile struct CommonBufferDescriptor {
-    cbd_t txbd;			/* Tx BD */
-    cbd_t rxbd[HDLC_PKTBUFSRX];	/* Rx BD */
-} RTXBD;
-
-static RTXBD *rtx;
-
-int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
-void keymile_hdlc_enet_halt(struct eth_device *);
-extern void keymile_hdlc_enet_init_bds(RTXBD *);
-extern void initCachedNumbers(int);
-
-/* Use SCC4 */
-#define MGS_CPM_CR_HDLC	CPM_CR_CH_SCC4
-#define MGS_PROFF_HDLC	PROFF_SCC4
-#define MGS_SCC_HDLC	3	/* Index, not number! */
-
-int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
-{
-	/* int i; */
-	/* volatile cbd_t *bdp; */
-	volatile cpm8xx_t *cp;
-	volatile scc_t *sccp;
-	volatile hdlc_pram_t *hpr;
-	volatile iop8xx_t *iop;
-
-	if (already_inited)
-		return 0;
-
-	cp = (cpm8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm);
-	hpr = (hdlc_pram_t *)(&cp->cp_dparam[MGS_PROFF_HDLC]);
-	sccp = (volatile scc_t *)(&cp->cp_scc[MGS_SCC_HDLC]);
-	iop = (iop8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport);
-
-	/*
-	 * Disable receive and transmit just in case.
-	 */
-	sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
-#ifndef CONFIG_SYS_ALLOC_DPRAM
-#error "CONFIG_SYS_ALLOC_DPRAM must be defined"
-#else
-	/*
-	 * Avoid exhausting DPRAM, which would cause a panic.
-	 * Actually this isn't really necessary, but leave it here
-	 * for safety's sake.
-	 */
-	if (rtx == NULL) {
-		rtx = (RTXBD *) (cp->cp_dpmem +
-			 dpram_alloc_align(sizeof(RTXBD), 8));
-		if (rtx == (RTXBD *)CPM_DP_NOSPACE)
-			return -1;
-		memset((void *)rtx, 0, sizeof(RTXBD));
-	}
-#endif /* !CONFIG_SYS_ALLOC_DPRAM */
-
-	/* We need the slot number for addressing. */
-	keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
-		CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
-	/*
-	 * Be consistent with the Linux driver and set
-	 * only enetaddr[0].
-	 *
-	 * Always add 1 to the slot number so that
-	 * there are no problems with an ethaddr which
-	 * is all 0s.  This should be acceptable because
-	 * a board should never have a slot number of 255,
-	 * which is the broadcast address.  The HDLC addressing
-	 * uses only the slot number.
-	 */
-	dev->enetaddr[0] = keymile_slot + 1;
-
-#ifdef TEST_IT
-	dprintf("slot %d\n", keymile_slot);
-#endif
-
-	/* use pa8, pa9 pins for TXD4, RXD4 respectively */
-	iop->iop_papar |= ((0x8000 >> 8) | (0x8000 >> 9));
-	iop->iop_padir &= ~((0x8000 >> 8) | (0x8000 >> 9));
-	iop->iop_paodr &= ~((0x8000 >> 8) | (0x8000 >> 9));
-
-	/* also use pa0 as CLK8 */
-	iop->iop_papar |= 0x8000;
-	iop->iop_padir &= ~0x8000;
-	iop->iop_paodr &= ~0x8000;
-
-	/* use pc5 as CTS4 */
-	iop->iop_pcpar &= ~(0x8000 >> 5);
-	iop->iop_pcdir &= ~(0x8000 >> 5);
-	iop->iop_pcso  |= (0x8000 >> 5);
-
-	/*
-	 * SI clock routing
-	 * use CLK8
-	 * this also connects SCC4 to NMSI
-	 */
-	cp->cp_sicr = (cp->cp_sicr & ~0xff000000) | 0x3f000000;
-
-	/* keymile_rxIdx = 0; */
-
-	/*
-	 * Initialize function code registers for big-endian.
-	 */
-	hpr->rfcr = SCC_EB;
-	hpr->tfcr = SCC_EB;
-
-	/*
-	 * Set maximum bytes per receive buffer.
-	 */
-	hpr->mrblr = MAX_FRAME_LENGTH;
-
-	/* Setup CRC generator values for HDLC */
-	hpr->c_mask = 0x0000F0B8;
-	hpr->c_pres = 0x0000FFFF;
-
-	/* Initialize all error counters to 0 */
-	hpr->disfc = 0;
-	hpr->crcec = 0;
-	hpr->abtsc = 0;
-	hpr->nmarc = 0;
-	hpr->retrc = 0;
-
-	/* Set maximum frame length size */
-	hpr->mflr = MAX_FRAME_LENGTH;
-
-	/* set to 1 for per frame processing change later if needed */
-	hpr->rfthr = 1;
-
-	hpr->hmask = 0xff;
-
-	hpr->haddr2 = SET_HDLC_UUA(keymile_slot);
-	hpr->haddr3 = hpr->haddr2;
-	hpr->haddr4 = hpr->haddr2;
-	/* broadcast */
-	hpr->haddr1 = HDLC_BCAST;
-
-	hpr->rbase = (unsigned int) &rtx->rxbd[0];
-	hpr->tbase = (unsigned int) &rtx->txbd;
-
-#if 0
-	/*
-	 * Initialize the buffer descriptors.
-	 */
-	bdp = &rtx->txbd;
-	bdp->cbd_sc = 0;
-	bdp->cbd_bufaddr = 0;
-	bdp->cbd_sc = BD_SC_WRAP;
-
-	/*
-	 *	Setup RX packet buffers, aligned correctly.
-	 *	Borrowed from net/net.c.
-	 */
-	MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1);
-	MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN;
-	for (i = 1; i < HDLC_PKTBUFSRX; i++)
-		MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE;
-
-	bdp = &rtx->rxbd[0];
-	for (i = 0; i < HDLC_PKTBUFSRX; i++) {
-		bdp->cbd_sc = BD_SC_EMPTY;
-		/* Leave space at the start for INET header. */
-		bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] +
-			INET_HDR_ALIGN);
-		bdp++;
-	}
-	bdp--;
-	bdp->cbd_sc |= BD_SC_WRAP;
-#else
-	keymile_hdlc_enet_init_bds(rtx);
-#endif
-
-	/* Let's re-initialize the channel now.	 We have to do it later
-	 * than the manual describes because we have just now finished
-	 * the BD initialization.
-	 */
-	cp->cp_cpcr = mk_cr_cmd(MGS_CPM_CR_HDLC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
-	while (cp->cp_cpcr & CPM_CR_FLG);
-
-	sccp->scc_gsmrl = SCC_GSMRL_MODE_HDLC;
-	/* CTSS=1 */
-	sccp->scc_gsmrh = SCC_GSMRH_CTSS;
-	/* NOF=0, RTE=1, DRT=0, BUS=1 */
-	sccp->scc_psmr = ((0x8000 >> 6) | (0x8000 >> 10));
-
-/* loopback for local testing */
-#ifdef GJTEST
-	dprintf("LOOPBACK!\n");
-	sccp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP;
-#endif
-
-	/*
-	 * Disable all interrupts and clear all pending
-	 * events.
-	 */
-	sccp->scc_sccm = 0;
-	sccp->scc_scce = 0xffff;
-
-	/*
-	 * And last, enable the transmit and receive processing.
-	 */
-	sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-
-	dprintf("%s: HDLC ENET Version 0.3 on SCC%d\n", dev->name,
-		MGS_SCC_HDLC + 1);
-
-	/*
-	 * We may not get an ARP packet because ARP was already done on
-	 * a different interface, so initialize the cached values now.
-	 */
-	initCachedNumbers(1);
-
-	already_inited = 1;
-
-	return 0;
-}
-
-void keymile_hdlc_enet_halt(struct eth_device *dev)
-{
-#if 0 /* just return, but keep this for reference */
-	volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
-
-	/* maybe should do a graceful stop here? */
-	immr->im_cpm.cp_scc[MGS_SCC_HDLC].scc_gsmrl &=
-		~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-}
-
-#endif /* CONFIG_KEYMILE_HDLC_ENET */
diff --git a/board/keymile/km8xx/u-boot.lds b/board/keymile/km8xx/u-boot.lds
deleted file mode 100644
index ea70ae458b..0000000000
--- a/board/keymile/km8xx/u-boot.lds
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * (C) Copyright 2000-2010
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-
-SECTIONS
-{
-  /* Read-only sections, merged into text segment: */
-  . = + SIZEOF_HEADERS;
-  .text      :
-  {
-    arch/powerpc/cpu/mpc8xx/start.o	(.text*)
-    arch/powerpc/cpu/mpc8xx/traps.o	(.text*)
-
-    *(.text*)
-  }
-  _etext = .;
-  PROVIDE (etext = .);
-  .rodata    :
-  {
-    *(.rodata)
-    *(.rodata1)
-    *(.rodata.str1.4)
-  }
-
-  /* Read-write section, merged into data segment: */
-  . = (. + 0x00FF) & 0xFFFFFF00;
-  _erotext = .;
-  PROVIDE (erotext = .);
-  .reloc   :
-  {
-    KEEP(*(.got))
-    _GOT2_TABLE_ = .;
-    KEEP(*(.got2))
-    _FIXUP_TABLE_ = .;
-    KEEP(*(.fixup))
-  }
-  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
-  __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
-  .data    :
-  {
-    *(.data*)
-    *(.sdata*)
-  }
-  _edata  =  .;
-  PROVIDE (edata = .);
-
-  . = .;
-  __u_boot_cmd_start = .;
-  .u_boot_cmd : { *(.u_boot_cmd) }
-  __u_boot_cmd_end = .;
-
-
-  . = .;
-  __start___ex_table = .;
-  __ex_table : { *(__ex_table) }
-  __stop___ex_table = .;
-
-  . = ALIGN(256);
-  __init_begin = .;
-  .text.init : { *(.text.init) }
-  .data.init : { *(.data.init) }
-  . = ALIGN(256);
-  __init_end = .;
-
-  __bss_start = .;
-  .bss (NOLOAD)       :
-  {
-   *(.bss*)
-   *(.sbss*)
-   *(COMMON)
-   . = ALIGN(4);
-  }
-  _end = . ;
-  PROVIDE (end = .);
-}