diff options
| author | vijay rai <vijay.rai@freescale.com> | 2014-08-19 12:46:53 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-24 13:02:03 -0700 |
| commit | 363fb32aca268701a0918d67099fb344194f1746 (patch) | |
| tree | 5fd638ac9895f3e22e9776e5f6024b1d160df50d /board/freescale/t104xrdb/eth.c | |
| parent | d087e0e26293a34752a6279da85f94a97084686c (diff) | |
| download | talos-obmc-uboot-363fb32aca268701a0918d67099fb344194f1746.tar.gz talos-obmc-uboot-363fb32aca268701a0918d67099fb344194f1746.zip | |
powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC
(and variants). The board is similar to T1040RDB, T1042 is a reduced
personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).
T1042RDB is configured with serdes protocol 0x86 which can support
following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
DTSEC1, DTSEC2 are not connected on board.
This Patch
- add T1042RDB support
- updates README file for T1042RDB details and update commands for switching
to alternate banks from vBank0 to vBank4 and vice versa
This patch also does minor clean ups for fdt defines for T1042RDB and
T1042RDB_PI board
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/t104xrdb/eth.c')
| -rw-r--r-- | board/freescale/t104xrdb/eth.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f900da..c8b6c672a6 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; |
