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| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2007-10-22 18:12:46 +0400 |
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-01-09 16:25:03 -0600 |
| commit | ad162249cb371e9e38971676f09be791e5f3cf4a (patch) | |
| tree | 268ae1825f88c6911f8fdd20e1f26d6f8d56710f /board/freescale/mpc8568mds | |
| parent | 2146cf56821c3364786ca94a7306008c5824b238 (diff) | |
| download | talos-obmc-uboot-ad162249cb371e9e38971676f09be791e5f3cf4a.tar.gz talos-obmc-uboot-ad162249cb371e9e38971676f09be791e5f3cf4a.zip | |
MPC8568E-MDS: reset UCCs to use them reliably
In order to use GETH1 and GETH2 on the MPC8568E-MDS, we should reset
UCCs.
p.s Similar code exists in the Linux kernel board file (for capability
reasons with older U-Boots), but should be removed some day.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Diffstat (limited to 'board/freescale/mpc8568mds')
| -rw-r--r-- | board/freescale/mpc8568mds/bcsr.c | 21 | ||||
| -rw-r--r-- | board/freescale/mpc8568mds/bcsr.h | 9 | ||||
| -rw-r--r-- | board/freescale/mpc8568mds/mpc8568mds.c | 3 |
3 files changed, 33 insertions, 0 deletions
diff --git a/board/freescale/mpc8568mds/bcsr.c b/board/freescale/mpc8568mds/bcsr.c index aae0f98e03..791a50fc92 100644 --- a/board/freescale/mpc8568mds/bcsr.c +++ b/board/freescale/mpc8568mds/bcsr.c @@ -21,6 +21,8 @@ */ #include <common.h> +#include <asm/io.h> + #include "bcsr.h" void enable_8568mds_duart() @@ -54,3 +56,22 @@ void enable_8568mds_qe_mdio() bcsr[7] |= 0x01; } + +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) +void reset_8568mds_uccs(void) +{ + volatile u8 *bcsr = (u8 *)(CFG_BCSR); + + /* Turn off UCC1 & UCC2 */ + out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); + out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); + + /* Mode is RGMII, all bits clear */ + out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | + BCSR_UCC2_MODE_MSK)); + + /* Turn UCC1 & UCC2 on */ + out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); + out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); +} +#endif diff --git a/board/freescale/mpc8568mds/bcsr.h b/board/freescale/mpc8568mds/bcsr.h index aefd9bf54d..f7f70bcfa1 100644 --- a/board/freescale/mpc8568mds/bcsr.h +++ b/board/freescale/mpc8568mds/bcsr.h @@ -90,6 +90,11 @@ 7 Flash write protect */ +#define BCSR_UCC1_GETH_EN (0x1 << 7) +#define BCSR_UCC2_GETH_EN (0x1 << 7) +#define BCSR_UCC1_MODE_MSK (0x3 << 4) +#define BCSR_UCC2_MODE_MSK (0x3 << 0) + /*BCSR Utils functions*/ void enable_8568mds_duart(void); @@ -97,4 +102,8 @@ void enable_8568mds_flash_write(void); void disable_8568mds_flash_write(void); void enable_8568mds_qe_mdio(void); +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) +void reset_8568mds_uccs(void); +#endif + #endif /* __BCSR_H_ */ diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 460cb1b275..1aaecf3d03 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -109,6 +109,9 @@ int board_early_init_f (void) enable_8568mds_duart(); enable_8568mds_flash_write(); +#if defined(CONFIG_UEC_ETH1) || defined(CONFIG_UEC_ETH2) + reset_8568mds_uccs(); +#endif #if defined(CONFIG_QE) && !defined(CONFIG_eTSEC_MDIO_BUS) enable_8568mds_qe_mdio(); #endif |
