summaryrefslogtreecommitdiffstats
path: root/board/freescale/ls1043ardb/cpld.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2016-05-24 13:42:03 -0400
committerTom Rini <trini@konsulko.com>2016-05-24 13:42:03 -0400
commitfc15b9beed05dec6cc092c265042381a0eadb0e9 (patch)
tree2b256906815661689177279d7cd23e30827c377b /board/freescale/ls1043ardb/cpld.c
parent2ee490a0245b65826a8ce8e42e34c9bf805d3656 (diff)
parentbc323b3fa7cbf1008f02d342c0505231961b5fa6 (diff)
downloadtalos-obmc-uboot-fc15b9beed05dec6cc092c265042381a0eadb0e9.tar.gz
talos-obmc-uboot-fc15b9beed05dec6cc092c265042381a0eadb0e9.zip
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'board/freescale/ls1043ardb/cpld.c')
-rw-r--r--board/freescale/ls1043ardb/cpld.c26
1 files changed, 24 insertions, 2 deletions
diff --git a/board/freescale/ls1043ardb/cpld.c b/board/freescale/ls1043ardb/cpld.c
index 78c28246a8..c6452830ed 100644
--- a/board/freescale/ls1043ardb/cpld.c
+++ b/board/freescale/ls1043ardb/cpld.c
@@ -28,10 +28,18 @@ void cpld_write(unsigned int reg, u8 value)
/* Set the boot bank to the alternate bank */
void cpld_set_altbank(void)
{
+ u16 reg = CPLD_CFG_RCW_SRC_NOR;
u8 reg4 = CPLD_READ(soft_mux_on);
+ u8 reg5 = (u8)(reg >> 1);
+ u8 reg6 = (u8)(reg & 1);
u8 reg7 = CPLD_READ(vbank);
- CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL);
+ cpld_rev_bit(&reg5);
+
+ CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
+
+ CPLD_WRITE(cfg_rcw_src1, reg5);
+ CPLD_WRITE(cfg_rcw_src2, reg6);
reg7 = (reg7 & ~CPLD_BANK_SEL_MASK) | CPLD_BANK_SEL_ALTBANK;
CPLD_WRITE(vbank, reg7);
@@ -42,7 +50,21 @@ void cpld_set_altbank(void)
/* Set the boot bank to the default bank */
void cpld_set_defbank(void)
{
- CPLD_WRITE(global_rst, 1);
+ u16 reg = CPLD_CFG_RCW_SRC_NOR;
+ u8 reg4 = CPLD_READ(soft_mux_on);
+ u8 reg5 = (u8)(reg >> 1);
+ u8 reg6 = (u8)(reg & 1);
+
+ cpld_rev_bit(&reg5);
+
+ CPLD_WRITE(soft_mux_on, reg4 | CPLD_SW_MUX_BANK_SEL | 1);
+
+ CPLD_WRITE(cfg_rcw_src1, reg5);
+ CPLD_WRITE(cfg_rcw_src2, reg6);
+
+ CPLD_WRITE(vbank, 0);
+
+ CPLD_WRITE(system_rst, 1);
}
void cpld_set_nand(void)
OpenPOWER on IntegriCloud