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| author | tang yuantian <Yuantian.Tang@freescale.com> | 2015-09-24 15:52:02 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2015-10-30 09:19:48 -0700 |
| commit | 0210a3698862801169e3149475174b5268602a93 (patch) | |
| tree | 0e8ab8910e41db60517dbb1fe71318a9aee7334a /board/freescale/common | |
| parent | 6ec9aef2cef311c57652e8d17b09eceac2cebb06 (diff) | |
| download | talos-obmc-uboot-0210a3698862801169e3149475174b5268602a93.tar.gz talos-obmc-uboot-0210a3698862801169e3149475174b5268602a93.zip | |
arm: ls1021atwr: optimize the deep sleep latency
It will take more than 1s when wake up from deep sleep. Most of the
time is spent on outputing information. This patch reduced the deep
sleep latency by:
1. avoid outputing system informaton
2. remove flush cache after DDR restore
3. skip reloading second stage uboot binary when SD boot
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/common')
| -rw-r--r-- | board/freescale/common/arm_sleep.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c index 8e8b7fa204..a498c65f04 100644 --- a/board/freescale/common/arm_sleep.c +++ b/board/freescale/common/arm_sleep.c @@ -12,7 +12,6 @@ #include <asm/secure.h> #endif #include <asm/armv7.h> -#include <asm/cache.h> #if defined(CONFIG_LS102XA) #include <asm/arch/immap_ls102xa.h> @@ -65,8 +64,6 @@ static void dp_ddr_restore(void) for (i = 0; i < DDR_BUFF_LEN / 8; i++) *dst++ = *src++; - - flush_dcache_all(); } static void dp_resume_prepare(void) @@ -74,7 +71,6 @@ static void dp_resume_prepare(void) dp_ddr_restore(); board_sleep_prepare(); armv7_init_nonsec(); - cleanup_before_linux(); #ifdef CONFIG_U_QE u_qe_resume(); #endif |
