ppc4xx: Big cleanup of PPC4xx defines

This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>

2 files changed, 14 insertions, 14 deletions

diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c
index 8e9ac28b18..28a50c7b0e 100644
--- a/board/esd/du405/du405.c
+++ b/board/esd/du405/du405.c
@@ -135,7 +135,7 @@ int board_early_init_f (void)
 	/*
 	 * EBC Configuration Register: set ready timeout to 100 us
 	 */
-	mtebc (epcr, 0xb8400000);
+	mtebc (EBC0_CFG, 0xb8400000);
 
 	return 0;
 }
@@ -143,13 +143,13 @@ int board_early_init_f (void)
 
 int misc_init_r (void)
 {
-	unsigned long cntrl0Reg;
+	unsigned long CPC0_CR0Reg;
 
 	/*
 	 * Setup UART1 handshaking: use CTS instead of DSR
 	 */
-	cntrl0Reg = mfdcr(cntrl0);
-	mtdcr(cntrl0, cntrl0Reg | 0x00001000);
+	CPC0_CR0Reg = mfdcr(CPC0_CR0);
+	mtdcr(CPC0_CR0, CPC0_CR0Reg | 0x00001000);
 
 	return (0);
 }
diff --git a/board/esd/du405/flash.c b/board/esd/du405/flash.c
index 240aa09f5b..c62c6a9b03 100644
--- a/board/esd/du405/flash.c
+++ b/board/esd/du405/flash.c
@@ -67,25 +67,25 @@ unsigned long flash_init (void)
 	/* Re-do sizing to get full correct info */
 
 	if (size_b1) {
-		mtdcr (ebccfga, pb0cr);
-		pbcr = mfdcr (ebccfgd);
-		mtdcr (ebccfga, pb0cr);
+		mtdcr (EBC0_CFGADDR, PB0CR);
+		pbcr = mfdcr (EBC0_CFGDATA);
+		mtdcr (EBC0_CFGADDR, PB0CR);
 		base_b1 = -size_b1;
 		pbcr = (pbcr & 0x0001ffff) | base_b1 |
 				(((size_b1 / 1024 / 1024) - 1) << 17);
-		mtdcr (ebccfgd, pbcr);
-		/*          printf("pb1cr = %x\n", pbcr); */
+		mtdcr (EBC0_CFGDATA, pbcr);
+		/*          printf("PB1CR = %x\n", pbcr); */
 	}
 
 	if (size_b0) {
-		mtdcr (ebccfga, pb1cr);
-		pbcr = mfdcr (ebccfgd);
-		mtdcr (ebccfga, pb1cr);
+		mtdcr (EBC0_CFGADDR, PB1CR);
+		pbcr = mfdcr (EBC0_CFGDATA);
+		mtdcr (EBC0_CFGADDR, PB1CR);
 		base_b0 = base_b1 - size_b0;
 		pbcr = (pbcr & 0x0001ffff) | base_b0 |
 				(((size_b0 / 1024 / 1024) - 1) << 17);
-		mtdcr (ebccfgd, pbcr);
-		/*            printf("pb0cr = %x\n", pbcr); */
+		mtdcr (EBC0_CFGDATA, pbcr);
+		/*            printf("PB0CR = %x\n", pbcr); */
 	}
 
 	size_b0 = flash_get_size ((vu_long *) base_b0, &flash_info[0]);