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authorMatthias Fuchs <matthias.fuchs@esd.eu>2015-01-12 22:47:17 +0100
committerTom Rini <trini@ti.com>2015-01-13 09:37:22 -0500
commit2404124c4777aa917ad95d25e78ca3ab03636132 (patch)
tree8279113d445c45464ae741a02b6e4d075e0771e1 /board/esd/cms700/cms700.c
parentb5e7c84f72ee6ce991569a4db610ab0b4a2a9978 (diff)
downloadtalos-obmc-uboot-2404124c4777aa917ad95d25e78ca3ab03636132.tar.gz
talos-obmc-uboot-2404124c4777aa917ad95d25e78ca3ab03636132.zip
ppc4xx: remove CMS700 board
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Diffstat (limited to 'board/esd/cms700/cms700.c')
-rw-r--r--board/esd/cms700/cms700.c192
1 files changed, 0 insertions, 192 deletions
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c
deleted file mode 100644
index 40d7621fd7..0000000000
--- a/board/esd/cms700/cms700.c
+++ /dev/null
@@ -1,192 +0,0 @@
-/*
- * (C) Copyright 2005-2007
- * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <command.h>
-#include <malloc.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-extern void lxt971_no_sleep(void);
-
-int board_early_init_f (void)
-{
- /*
- * IRQ 0-15 405GP internally generated; active high; level sensitive
- * IRQ 16 405GP internally generated; active low; level sensitive
- * IRQ 17-24 RESERVED
- * IRQ 25 (EXT IRQ 0) CAN0; active low; level sensitive
- * IRQ 26 (EXT IRQ 1) SER0 ; active low; level sensitive
- * IRQ 27 (EXT IRQ 2) SER1; active low; level sensitive
- * IRQ 28 (EXT IRQ 3) FPGA 0; active low; level sensitive
- * IRQ 29 (EXT IRQ 4) FPGA 1; active low; level sensitive
- * IRQ 30 (EXT IRQ 5) PCI INTA; active low; level sensitive
- * IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
- */
- mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
- mtdcr(UIC0ER, 0x00000000); /* disable all ints */
- mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical*/
- mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */
- mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
- mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
-
- /*
- * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us
- */
- mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */
-
- /*
- * Reset CPLD via GPIO12 (CS3) pin
- */
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_PLD_RESET);
- udelay(1000); /* wait 1ms */
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_PLD_RESET);
- udelay(1000); /* wait 1ms */
-
- return 0;
-}
-
-int misc_init_r (void)
-{
- /* adjust flash start and offset */
- gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
- gd->bd->bi_flashoffset = 0;
-
- /*
- * Setup and enable EEPROM write protection
- */
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
-
- return (0);
-}
-
-
-/*
- * Check Board Identity:
- */
-#define LED_REG (CONFIG_SYS_PLD_BASE + 0x1000)
-int checkboard (void)
-{
- char str[64];
- int flashcnt;
- int delay;
-
- puts ("Board: ");
-
- if (getenv_f("serial#", str, sizeof(str)) == -1) {
- puts ("### No HW ID - assuming CMS700");
- } else {
- puts(str);
- }
-
- printf(" (PLD-Version=%02d)\n",
- in_8((void *)(CONFIG_SYS_PLD_BASE + 0x1001)));
-
- /*
- * Flash LEDs
- */
- for (flashcnt = 0; flashcnt < 3; flashcnt++) {
- out_8((void *)LED_REG, 0x00); /* LEDs off */
- for (delay = 0; delay < 100; delay++)
- udelay(1000);
- out_8((void *)LED_REG, 0x0f); /* LEDs on */
- for (delay = 0; delay < 50; delay++)
- udelay(1000);
- }
- out_8((void *)LED_REG, 0x70);
-
- return 0;
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if defined(CONFIG_SYS_EEPROM_WREN)
-/* Input: <dev_addr> I2C address of EEPROM device to enable.
- * <state> -1: deliver current state
- * 0: disable write
- * 1: enable write
- * Returns: -1: wrong device address
- * 0: dis-/en- able done
- * 0/1: current state if <state> was -1.
- */
-int eeprom_write_enable (unsigned dev_addr, int state)
-{
- if (CONFIG_SYS_I2C_EEPROM_ADDR != dev_addr) {
- return -1;
- } else {
- switch (state) {
- case 1:
- /* Enable write access, clear bit GPIO_SINT2. */
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_EEPROM_WP);
- state = 0;
- break;
- case 0:
- /* Disable write access, set bit GPIO_SINT2. */
- out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_EEPROM_WP);
- state = 0;
- break;
- default:
- /* Read current status back. */
- state = (0 == (in_be32((void *)GPIO0_OR) & CONFIG_SYS_EEPROM_WP));
- break;
- }
- }
- return state;
-}
-
-int do_eep_wren (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int query = argc == 1;
- int state = 0;
-
- if (query) {
- /* Query write access state. */
- state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, -1);
- if (state < 0) {
- puts ("Query of write access state failed.\n");
- } else {
- printf ("Write access for device 0x%0x is %sabled.\n",
- CONFIG_SYS_I2C_EEPROM_ADDR, state ? "en" : "dis");
- state = 0;
- }
- } else {
- if ('0' == argv[1][0]) {
- /* Disable write access. */
- state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, 0);
- } else {
- /* Enable write access. */
- state = eeprom_write_enable (CONFIG_SYS_I2C_EEPROM_ADDR, 1);
- }
- if (state < 0) {
- puts ("Setup of write access state failed.\n");
- }
- }
-
- return state;
-}
-
-U_BOOT_CMD(eepwren, 2, 0, do_eep_wren,
- "Enable / disable / query EEPROM write access",
- ""
-);
-#endif /* #if defined(CONFIG_SYS_EEPROM_WREN) */
-
-/* ------------------------------------------------------------------------- */
-
-void reset_phy(void)
-{
-#ifdef CONFIG_LXT971_NO_SLEEP
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-#endif
-}
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