cm-t54: add cm-t54 board support

Add cm-t54 board directory, config file. Enable build.

Basic support includes:

Serial console
SD/MMC
eMMC
USB
Ethernet

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>

4 files changed, 347 insertions, 0 deletions

diff --git a/board/compulab/cm_t54/Makefile b/board/compulab/cm_t54/Makefile
new file mode 100644
index 0000000000..298ddd2d1d
--- /dev/null
+++ b/board/compulab/cm_t54/Makefile
@@ -0,0 +1,10 @@
+#
+# Copyright (C) 2014 Compulab Ltd - http://compulab.co.il/
+#
+# Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y += cm_t54.o
+obj-$(CONFIG_SPL_BUILD) += mux.o spl.o
diff --git a/board/compulab/cm_t54/cm_t54.c b/board/compulab/cm_t54/cm_t54.c
new file mode 100644
index 0000000000..e0df47e72b
--- /dev/null
+++ b/board/compulab/cm_t54/cm_t54.c
@@ -0,0 +1,177 @@
+/*
+ * Board functions for Compulab CM-T54 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <usb.h>
+#include <mmc.h>
+#include <palmas.h>
+
+#include <asm/gpio.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/clock.h>
+#include <asm/arch/ehci.h>
+#include <asm/ehci-omap.h>
+
+#define DIE_ID_REG_BASE		(OMAP54XX_L4_CORE_BASE + 0x2000)
+#define DIE_ID_REG_OFFSET	0x200
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if !defined(CONFIG_SPL_BUILD)
+inline void set_muxconf_regs_essential(void){};
+#endif
+
+const struct omap_sysinfo sysinfo = {
+	"Board: CM-T54\n"
+};
+
+/*
+ * Routine: board_init
+ * Description: hardware init.
+ */
+int board_init(void)
+{
+	gd->bd->bi_boot_params = (CONFIG_SYS_SDRAM_BASE + 0x100); /* boot param addr */
+
+	return 0;
+}
+
+/*
+ * Routine: cm_t54_palmas_regulator_set
+ * Description:  select voltage and turn on/off Palmas PMIC regulator.
+ */
+static int cm_t54_palmas_regulator_set(u8 vreg, u8 vval, u8 creg, u8 cval)
+{
+	int err;
+
+	/* Setup voltage */
+	err = palmas_i2c_write_u8(TWL603X_CHIP_P1, vreg, vval);
+	if (err) {
+		printf("cm_t54: could not set regulator 0x%02x voltage : %d\n",
+		       vreg, err);
+		return err;
+	}
+
+	/* Turn on/off regulator */
+	err = palmas_i2c_write_u8(TWL603X_CHIP_P1, creg, cval);
+	if (err) {
+		printf("cm_t54: could not turn on/off regulator 0x%02x : %d\n",
+		       creg, err);
+		return err;
+	}
+
+	return 0;
+}
+
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
+#define SB_T54_CD_GPIO 228
+#define SB_T54_WP_GPIO 229
+
+int board_mmc_getcd(struct mmc *mmc)
+{
+	return !gpio_get_value(SB_T54_CD_GPIO);
+}
+
+int board_mmc_init(bd_t *bis)
+{
+	int ret0, ret1;
+
+	ret0 = omap_mmc_init(0, 0, 0, -1, SB_T54_WP_GPIO);
+	if (ret0)
+		printf("cm_t54: failed to initialize mmc0\n");
+
+	ret1 = omap_mmc_init(1, 0, 0, -1, -1);
+	if (ret1)
+		printf("cm_t54: failed to initialize mmc1\n");
+
+	if (ret0 && ret1)
+		return -1;
+
+	return 0;
+}
+#endif
+
+#ifdef CONFIG_USB_EHCI
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_HSIC,
+	.port_mode[2] = OMAP_EHCI_PORT_MODE_HSIC,
+};
+
+static void setup_host_clocks(bool enable)
+{
+	int usbhost_clk = OPTFCLKEN_HSIC60M_P3_CLK |
+			  OPTFCLKEN_HSIC480M_P3_CLK |
+			  OPTFCLKEN_HSIC60M_P2_CLK |
+			  OPTFCLKEN_HSIC480M_P2_CLK |
+			  OPTFCLKEN_UTMI_P3_CLK |
+			  OPTFCLKEN_UTMI_P2_CLK;
+
+	int usbtll_clk = OPTFCLKEN_USB_CH1_CLK_ENABLE |
+			 OPTFCLKEN_USB_CH2_CLK_ENABLE;
+
+	int usbhub_clk = CKOBUFFER_CLK_ENABLE_MASK;
+
+	if (enable) {
+		/* Enable port 2 and 3 clocks*/
+		setbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
+		/* Enable port 2 and 3 usb host ports tll clocks*/
+		setbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
+		/* Request FREF_XTAL_CLK clock for HSIC USB Hub */
+		setbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
+	} else {
+		clrbits_le32((*ctrl)->control_ckobuffer, usbhub_clk);
+		clrbits_le32((*prcm)->cm_l3init_hsusbtll_clkctrl, usbtll_clk);
+		clrbits_le32((*prcm)->cm_l3init_hsusbhost_clkctrl, usbhost_clk);
+	}
+}
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+		struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	int ret;
+
+	/* VCC_3V3_ETH */
+	cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_3V3, SMPS9_CTRL,
+				    SMPS_MODE_SLP_AUTO | SMPS_MODE_ACT_AUTO);
+
+	setup_host_clocks(true);
+
+	ret = omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+	if (ret < 0)
+		printf("cm_t54: Failed to initialize ehci : %d\n", ret);
+
+	return ret;
+}
+
+int ehci_hcd_stop(void)
+{
+	int ret = omap_ehci_hcd_stop();
+
+	setup_host_clocks(false);
+
+	cm_t54_palmas_regulator_set(SMPS9_VOLTAGE, SMPS_VOLT_OFF,
+				    SMPS9_CTRL, SMPS_MODE_SLP_AUTO);
+
+	return ret;
+}
+
+void usb_hub_reset_devices(int port)
+{
+	/* The LAN9730 needs to be reset after the port power has been set. */
+	if (port == 3) {
+		gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 0);
+		udelay(10);
+		gpio_direction_output(CONFIG_OMAP_EHCI_PHY3_RESET_GPIO, 1);
+	}
+}
+#endif
+
diff --git a/board/compulab/cm_t54/mux.c b/board/compulab/cm_t54/mux.c
new file mode 100644
index 0000000000..da353831c0
--- /dev/null
+++ b/board/compulab/cm_t54/mux.c
@@ -0,0 +1,94 @@
+/*
+ * Pinmux configuration for Compulab CM-T54 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _CM_T54_MUX_DATA_H
+#define _CM_T54_MUX_DATA_H
+
+#include <asm/arch/mux_omap5.h>
+#include <asm/arch/sys_proto.h>
+
+const struct pad_conf_entry core_padconf_array_essential[] = {
+	/* MMC1 - SD CARD */
+	{SDCARD_CLK, (PTU | IEN | M0)},			/* SDCARD_CLK */
+	{SDCARD_CMD, (PTU | IEN | M0)},			/* SDCARD_CMD */
+	{SDCARD_DATA0, (PTU | IEN | M0)},		/* SDCARD_DATA0 */
+	{SDCARD_DATA1, (PTU | IEN | M0)},		/* SDCARD_DATA1 */
+	{SDCARD_DATA2, (PTU | IEN | M0)},		/* SDCARD_DATA2 */
+	{SDCARD_DATA3, (PTU | IEN | M0)},		/* SDCARD_DATA3 */
+
+	/* SD CARD CD and WP GPIOs*/
+	{TIMER5_PWM_EVT, (PTU | IEN | M6)},		/* GPIO8_228 */
+	{TIMER6_PWM_EVT, (PTU | IEN | M6)},		/* GPIO8_229 */
+
+	/* MMC2 - eMMC */
+	{EMMC_CLK, (PTU | IEN | M0)},			/* EMMC_CLK */
+	{EMMC_CMD, (PTU | IEN | M0)},			/* EMMC_CMD */
+	{EMMC_DATA0, (PTU | IEN | M0)},			/* EMMC_DATA0 */
+	{EMMC_DATA1, (PTU | IEN | M0)},			/* EMMC_DATA1 */
+	{EMMC_DATA2, (PTU | IEN | M0)},			/* EMMC_DATA2 */
+	{EMMC_DATA3, (PTU | IEN | M0)},			/* EMMC_DATA3 */
+	{EMMC_DATA4, (PTU | IEN | M0)},			/* EMMC_DATA4 */
+	{EMMC_DATA5, (PTU | IEN | M0)},			/* EMMC_DATA5 */
+	{EMMC_DATA6, (PTU | IEN | M0)},			/* EMMC_DATA6 */
+	{EMMC_DATA7, (PTU | IEN | M0)},			/* EMMC_DATA7 */
+
+	/* UART4 */
+	{I2C5_SCL, (PTU | IEN | M2)},			/* UART4_RX */
+	{I2C5_SDA, (M2)},				/* UART4_TX */
+
+	/* Led */
+	{HSI2_CAFLAG, (PTU | M6)},			/* GPIO3_80 */
+
+	/* I2C1 */
+	{I2C1_PMIC_SCL, (PTU | IEN | M0)},		/* I2C1_PMIC_SCL */
+	{I2C1_PMIC_SDA, (PTU | IEN | M0)},		/* I2C1_PMIC_SDA */
+
+	/* USBB2, USBB3 */
+	{USBB2_HSIC_STROBE, (PTU | IEN | M0)},		/* USBB2_HSIC_STROBE */
+	{USBB2_HSIC_DATA, (PTU | IEN | M0)},		/* USBB2_HSIC_DATA */
+	{USBB3_HSIC_STROBE, (PTU | IEN | M0)},		/* USBB3_HSIC_STROBE */
+	{USBB3_HSIC_DATA, (PTU | IEN | M0)},		/* USBB3_HSIC_DATA */
+
+	/* USB Hub and USB Eth reset GPIOs */
+	{HSI2_CAREADY, (PTD | M6)},			/* GPIO3_76 */
+	{HSI2_ACDATA, (PTD | M6)},			/* GPIO3_83 */
+
+	/* I2C4 */
+	{I2C4_SCL, (PTU | IEN | M0)},			/* I2C4_SCL  */
+	{I2C4_SDA, (PTU | IEN | M0)},			/* I2C4_SDA  */
+};
+
+const struct pad_conf_entry wkup_padconf_array_essential[] = {
+	{SR_PMIC_SCL, (PTU | IEN | M0)},		/* SR_PMIC_SCL */
+	{SR_PMIC_SDA, (PTU | IEN | M0)},		/* SR_PMIC_SDA */
+	{SYS_32K, (IEN | M0)},				/* SYS_32K */
+
+	/* USB Hub clock */
+	{FREF_CLK1_OUT, (PTD | IEN | M0)},		/* FREF_CLK1_OUT  */
+};
+
+/*
+ * Routine: set_muxconf_regs_essential
+ * Description: setup board pinmux configuration.
+ */
+void set_muxconf_regs_essential(void)
+{
+	do_set_mux((*ctrl)->control_padconf_core_base,
+		   core_padconf_array_essential,
+		   sizeof(core_padconf_array_essential) /
+		   sizeof(struct pad_conf_entry));
+
+	do_set_mux((*ctrl)->control_padconf_wkup_base,
+		   wkup_padconf_array_essential,
+		   sizeof(wkup_padconf_array_essential) /
+		   sizeof(struct pad_conf_entry));
+}
+
+#endif /* _CM_T54_MUX_DATA_H */
diff --git a/board/compulab/cm_t54/spl.c b/board/compulab/cm_t54/spl.c
new file mode 100644
index 0000000000..5c7b2c8e93
--- /dev/null
+++ b/board/compulab/cm_t54/spl.c
@@ -0,0 +1,66 @@
+/*
+ * SPL specific code for Compulab CM-T54 board
+ *
+ * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/
+ *
+ * Author: Dmitry Lifshitz <lifshitz@compulab.co.il>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/emif.h>
+
+const struct emif_regs emif_regs_ddr3_532_mhz_cm_t54 = {
+#if defined(CONFIG_DRAM_1G) || defined(CONFIG_DRAM_512M)
+	.sdram_config_init              = 0x618522B2,
+	.sdram_config                   = 0x618522B2,
+#elif defined(CONFIG_DRAM_2G)
+	.sdram_config_init              = 0x618522BA,
+	.sdram_config                   = 0x618522BA,
+#endif
+	.sdram_config2			= 0x0,
+	.ref_ctrl                       = 0x00001040,
+	.sdram_tim1                     = 0xEEEF36F3,
+	.sdram_tim2                     = 0x348F7FDA,
+	.sdram_tim3                     = 0x027F88A8,
+	.read_idle_ctrl                 = 0x00050000,
+	.zq_config                      = 0x1007190B,
+	.temp_alert_config              = 0x00000000,
+
+	.emif_ddr_phy_ctlr_1_init       = 0x0030400B,
+	.emif_ddr_phy_ctlr_1            = 0x0034400B,
+	.emif_ddr_ext_phy_ctrl_1        = 0x04040100,
+	.emif_ddr_ext_phy_ctrl_2        = 0x00000000,
+	.emif_ddr_ext_phy_ctrl_3        = 0x00000000,
+	.emif_ddr_ext_phy_ctrl_4        = 0x00000000,
+	.emif_ddr_ext_phy_ctrl_5        = 0x4350D435,
+	.emif_rd_wr_lvl_rmp_win         = 0x00000000,
+	.emif_rd_wr_lvl_rmp_ctl         = 0x80000000,
+	.emif_rd_wr_lvl_ctl             = 0x00000000,
+	.emif_rd_wr_exec_thresh         = 0x40000305,
+};
+
+const struct dmm_lisa_map_regs lisa_map_cm_t54 = {
+	.dmm_lisa_map_0 = 0x0,
+	.dmm_lisa_map_1 = 0x0,
+
+#ifdef CONFIG_DRAM_2G
+	.dmm_lisa_map_2 = 0x80740300,
+#elif defined(CONFIG_DRAM_1G)
+	.dmm_lisa_map_2 = 0x80640300,
+#elif defined(CONFIG_DRAM_512M)
+	.dmm_lisa_map_2 = 0x80500100,
+#endif
+	.dmm_lisa_map_3 = 0x00000000,
+	.is_ma_present	= 0x1,
+};
+
+void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
+{
+	*regs = &emif_regs_ddr3_532_mhz_cm_t54;
+}
+
+void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
+{
+	*dmm_lisa_regs = &lisa_map_cm_t54;
+}