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authorThierry Reding <treding@nvidia.com>2014-12-09 22:25:25 -0700
committerTom Warren <twarren@nvidia.com>2014-12-18 13:21:41 -0700
commitdad3ba0f0bb5ee2e87881c9f3a7ecfb8db384b2b (patch)
tree421e2053f773121ad771298d85b3d7d37f8a6018 /board/bf538f-ezkit/config.mk
parentc94bbfdf516e0ebaf2cb08025174f224c0b391f0 (diff)
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net: rtl8169: Properly align buffers
RX and TX descriptor rings should be aligned to 256 byte boundaries. Use the DEFINE_ALIGN_BUFFER() macro to define the buffers so that they don't have to be manually aligned later on. Also make sure that the buffers do align to cache-line boundaries in case the cache-line is higher than the 256 byte alignment requirements of the NIC. Also add a warning if the cache-line size is larger than the descriptor size, because the driver may discard changes to descriptors made by the hardware when requeuing RX buffers. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
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