diff options
| author | Erik van Luijk <evanluijk@interact.nl> | 2015-08-13 15:43:20 +0200 |
|---|---|---|
| committer | Andreas Bießmann <andreas.devel@googlemail.com> | 2015-08-21 15:47:03 +0200 |
| commit | c982f6b9bf7815633640d95ed6f0deb55cfdcde5 (patch) | |
| tree | 326e11936c417b7cbd5ba1944c4934e1d5020274 /board/atmel | |
| parent | 6560491fe5acd2f150853efdd5d9bd714a93374c (diff) | |
| download | talos-obmc-uboot-c982f6b9bf7815633640d95ed6f0deb55cfdcde5.tar.gz talos-obmc-uboot-c982f6b9bf7815633640d95ed6f0deb55cfdcde5.zip | |
arm: at91: pmc: replace the constant with a define in at91_pmc.h
To enable the clocks on the at91 boards a constant (0x4) is used.
This is replaced with a define in at91_pmc.h (1 << 2).
Signed-off-by: Erik van Luijk <evanluijk@interact.nl>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/atmel')
| -rw-r--r-- | board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 2 | ||||
| -rw-r--r-- | board/atmel/at91sam9n12ek/at91sam9n12ek.c | 2 | ||||
| -rw-r--r-- | board/atmel/at91sam9x5ek/at91sam9x5ek.c | 2 | ||||
| -rw-r--r-- | board/atmel/sama5d3_xplained/sama5d3_xplained.c | 2 | ||||
| -rw-r--r-- | board/atmel/sama5d3xek/sama5d3xek.c | 2 | ||||
| -rw-r--r-- | board/atmel/sama5d4_xplained/sama5d4_xplained.c | 2 | ||||
| -rw-r--r-- | board/atmel/sama5d4ek/sama5d4ek.c | 2 |
7 files changed, 7 insertions, 7 deletions
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index d2ade4d066..2fea56ffe7 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -136,7 +136,7 @@ void mem_init(void) ddr2_conf(&ddr2); /* enable DDR2 clock */ - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); diff --git a/board/atmel/at91sam9n12ek/at91sam9n12ek.c b/board/atmel/at91sam9n12ek/at91sam9n12ek.c index 8437f37d33..59bc5350de 100644 --- a/board/atmel/at91sam9n12ek/at91sam9n12ek.c +++ b/board/atmel/at91sam9n12ek/at91sam9n12ek.c @@ -316,7 +316,7 @@ void mem_init(void) ddr2_conf(&ddr2); /* enable DDR2 clock */ - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* Chip select 1 is for DDR2/SDRAM */ csa = readl(&matrix->ebicsa); diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 0455e2cb30..1738a2b309 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -353,7 +353,7 @@ void mem_init(void) ddr2_conf(&ddr2); /* enable DDR2 clock */ - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* Chip select 1 is for DDR2/SDRAM */ csa = readl(&matrix->ebicsa); diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 0793e4aaba..7a01149e11 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -191,7 +191,7 @@ void mem_init(void) /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index d6e7e163bd..2bd436a2d8 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -430,7 +430,7 @@ void mem_init(void) /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); diff --git a/board/atmel/sama5d4_xplained/sama5d4_xplained.c b/board/atmel/sama5d4_xplained/sama5d4_xplained.c index 71ec4b7471..db45331480 100644 --- a/board/atmel/sama5d4_xplained/sama5d4_xplained.c +++ b/board/atmel/sama5d4_xplained/sama5d4_xplained.c @@ -390,7 +390,7 @@ void mem_init(void) /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); diff --git a/board/atmel/sama5d4ek/sama5d4ek.c b/board/atmel/sama5d4ek/sama5d4ek.c index de4291f94a..357b223e1b 100644 --- a/board/atmel/sama5d4ek/sama5d4ek.c +++ b/board/atmel/sama5d4ek/sama5d4ek.c @@ -386,7 +386,7 @@ void mem_init(void) /* enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(0x4, &pmc->scer); + writel(AT91_PMC_DDR, &pmc->scer); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); |
