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| author | Wenyou Yang <wenyou.yang@atmel.com> | 2016-04-11 16:41:33 +0800 |
|---|---|---|
| committer | Andreas Bießmann <andreas@biessmann.org> | 2016-05-24 08:08:37 +0200 |
| commit | c043d8d8ce8bf1c1946c87a89b6639db3ebb4243 (patch) | |
| tree | e0c5e9d8f9b45ca6c2dc1d7dead327bc63a040cb /board/atmel | |
| parent | 7a91e1a3835413aac3e7c894ca1ba205e6ade887 (diff) | |
| download | talos-obmc-uboot-c043d8d8ce8bf1c1946c87a89b6639db3ebb4243.tar.gz talos-obmc-uboot-c043d8d8ce8bf1c1946c87a89b6639db3ebb4243.zip | |
board: sama5d2_xplained: change SDHCI GCK's clock source to UPLL
Change the clock source of the SDHCI's generated clock from PLLA to
UPLL clock to align to Linux driver.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Diffstat (limited to 'board/atmel')
| -rw-r--r-- | board/atmel/sama5d2_xplained/sama5d2_xplained.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/atmel/sama5d2_xplained/sama5d2_xplained.c b/board/atmel/sama5d2_xplained/sama5d2_xplained.c index 04422ce9be..93df7ba32a 100644 --- a/board/atmel/sama5d2_xplained/sama5d2_xplained.c +++ b/board/atmel/sama5d2_xplained/sama5d2_xplained.c @@ -175,7 +175,7 @@ static void board_sdhci0_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SDMMC0); at91_enable_periph_generated_clk(ATMEL_ID_SDMMC0, - GCK_CSS_PLLA_CLK, 1); + GCK_CSS_UPLL_CLK, 1); } static void board_sdhci1_hw_init(void) @@ -191,7 +191,7 @@ static void board_sdhci1_hw_init(void) at91_periph_clk_enable(ATMEL_ID_SDMMC1); at91_enable_periph_generated_clk(ATMEL_ID_SDMMC1, - GCK_CSS_PLLA_CLK, 1); + GCK_CSS_UPLL_CLK, 1); } int board_mmc_init(bd_t *bis) |
