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author | Tom Rini <trini@konsulko.com> | 2016-02-20 17:32:48 -0500 |
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committer | Tom Rini <trini@konsulko.com> | 2016-02-20 17:32:48 -0500 |
commit | 20680b560a17fb29c862de77930cfbf76b24f83c (patch) | |
tree | f66975032b21063ad86fd01553983b3c79b398cf /board/atmel/sama5d3_xplained | |
parent | db6ce2312dcae87619136457d1f9df56789f630a (diff) | |
parent | 2a0b9ea3067b00366455b0504056cb6728a0b865 (diff) | |
download | talos-obmc-uboot-20680b560a17fb29c862de77930cfbf76b24f83c.tar.gz talos-obmc-uboot-20680b560a17fb29c862de77930cfbf76b24f83c.zip |
Merge branch 'master' of git://git.denx.de/u-boot-atmel
Diffstat (limited to 'board/atmel/sama5d3_xplained')
-rw-r--r-- | board/atmel/sama5d3_xplained/sama5d3_xplained.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/board/atmel/sama5d3_xplained/sama5d3_xplained.c b/board/atmel/sama5d3_xplained/sama5d3_xplained.c index 7acb8d0974..2b9da91b2d 100644 --- a/board/atmel/sama5d3_xplained/sama5d3_xplained.c +++ b/board/atmel/sama5d3_xplained/sama5d3_xplained.c @@ -10,7 +10,6 @@ #include <asm/io.h> #include <asm/arch/sama5d3_smc.h> #include <asm/arch/at91_common.h> -#include <asm/arch/at91_pmc.h> #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/clk.h> @@ -184,14 +183,13 @@ static void ddr2_conf(struct atmel_mpddrc_config *ddr2) void mem_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; struct atmel_mpddrc_config ddr2; ddr2_conf(&ddr2); - /* enable MPDDR clock */ + /* Enable MPDDR clock */ at91_periph_clk_enable(ATMEL_ID_MPDDRC); - writel(AT91_PMC_DDR, &pmc->scer); + at91_system_clk_enable(AT91_PMC_DDR); /* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_MPDDRC, ATMEL_BASE_DDRCS, &ddr2); @@ -199,7 +197,6 @@ void mem_init(void) void at91_pmc_init(void) { - struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; u32 tmp; tmp = AT91_PMC_PLLAR_29 | @@ -208,7 +205,7 @@ void at91_pmc_init(void) AT91_PMC_PLLXR_DIV(1); at91_plla_init(tmp); - writel(0x3 << 8, &pmc->pllicpr); + at91_pllicpr_init(AT91_PMC_IPLL_PLLA(0x3)); tmp = AT91_PMC_MCKR_MDIV_4 | AT91_PMC_MCKR_CSS_PLLA; |