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authorLinus Walleij <linus.walleij@linaro.org>2011-10-23 21:02:03 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-11-08 22:04:47 +0100
commit46b5ccbfe299887fa1f8b15d494d0a5f0e75ee2e (patch)
tree59c3cd90759625cb01c328d88045242f0c157ad8 /board/armltd
parent60d1ea94ead7327d46f0a38cf8d20663a508fe34 (diff)
downloadtalos-obmc-uboot-46b5ccbfe299887fa1f8b15d494d0a5f0e75ee2e.tar.gz
talos-obmc-uboot-46b5ccbfe299887fa1f8b15d494d0a5f0e75ee2e.zip
integrator: do not test first part of the memory
When booting from Flash, the Integrator remaps its flash memory from 0x24000000 to 0x00000000, and starts executing it at 0x00000000. This ROM thus hides the RAM underneath and first 0x40000 bytes of the memory cannot be tested by get_ram_size(). So let's test from 0x40000 to the end of detected memory instead. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'board/armltd')
-rw-r--r--board/armltd/integrator/integrator.c19
1 files changed, 15 insertions, 4 deletions
diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c
index c8d2bc7bac..83f047c93e 100644
--- a/board/armltd/integrator/integrator.c
+++ b/board/armltd/integrator/integrator.c
@@ -86,6 +86,15 @@ int misc_init_r (void)
return (0);
}
+/*
+ * The Integrator remaps the Flash memory to 0x00000000 and executes U-Boot
+ * from there, which means we cannot test the RAM underneath the ROM at this
+ * point. It will be unmapped later on, when we are executing from the
+ * relocated in RAM U-Boot. We simply assume that this RAM is usable if the
+ * RAM on higher addresses works fine.
+ */
+#define REMAPPED_FLASH_SZ 0x40000
+
int dram_init (void)
{
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
@@ -111,15 +120,17 @@ extern void dram_query(void);
*
*/
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
- gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+ REMAPPED_FLASH_SZ,
0x01000000 << sdram_shift);
}
#else
- gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
- gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
+ gd->ram_size = get_ram_size((long *) CONFIG_SYS_SDRAM_BASE +
+ REMAPPED_FLASH_SZ,
PHYS_SDRAM_1_SIZE);
#endif /* CM_SPD_DETECT */
+ /* We only have one bank of RAM, set it to whatever was detected */
+ gd->bd->bi_dram[0].size = gd->ram_size;
return 0;
}
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