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| author | Wolfgang Denk <wd@denx.de> | 2008-01-14 10:48:28 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-01-14 10:48:28 +0100 |
| commit | 5dd372a23d12003276dddf7f9604154fd522ae73 (patch) | |
| tree | 2412e88bbf804e74759ef0793d67064b76b8ab1a /board/ads5121/ads5121.c | |
| parent | 06c428bcd4413014b43236e77765022071424fa6 (diff) | |
| parent | a0dd99d51efa55fe023e19c97ead92683725eb11 (diff) | |
| download | talos-obmc-uboot-5dd372a23d12003276dddf7f9604154fd522ae73.tar.gz talos-obmc-uboot-5dd372a23d12003276dddf7f9604154fd522ae73.zip | |
Merge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Diffstat (limited to 'board/ads5121/ads5121.c')
| -rw-r--r-- | board/ads5121/ads5121.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 8531657bde..1582c22067 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -33,7 +33,8 @@ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \ CLOCK_SCCR1_PSCFIFO_EN | \ CLOCK_SCCR1_DDR_EN | \ - CLOCK_SCCR1_FEC_EN) + CLOCK_SCCR1_FEC_EN | \ + CLOCK_SCCR1_TPR_EN) #define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \ CLOCK_SCCR2_SPDIF_EN | \ @@ -139,7 +140,7 @@ long int fixed_sdram (void) im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU; im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU; im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU; - im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AU; + im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AL; im->mddrc.lut_table1_alternate_lower = CFG_MDDRCGRP_LUT1_AL; im->mddrc.lut_table2_alternate_lower = CFG_MDDRCGRP_LUT2_AL; im->mddrc.lut_table3_alternate_lower = CFG_MDDRCGRP_LUT3_AL; @@ -180,9 +181,17 @@ int checkboard (void) { ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00); uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02); + volatile immap_t *im = (immap_t *) CFG_IMMR; + volatile unsigned long *reg; + int i; printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n", brd_rev, cpld_rev); + + /* change the slew rate on all pata pins to max */ + reg = (unsigned long *) &(im->io_ctrl.regs[PATA_CE1_IDX]); + for (i = 0; i < 9; i++) + reg[i] |= 0x00000003; return 0; } |
