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authorTom Rini <trini@konsulko.com>2015-03-10 19:09:18 -0400
committerTom Rini <trini@konsulko.com>2015-03-10 19:09:18 -0400
commitb79dadf846e5e140e261bbfa4decd024357702d7 (patch)
treebbfed4207c806f34ceb4b608e62cc4fbfa98f91f /board/LaCie
parent1fc42018a0fe833a4332f8f32d6aeb675f3dcd1d (diff)
parentd5338c693e6a35a7108c184839d688a7377d117c (diff)
downloadtalos-obmc-uboot-b79dadf846e5e140e261bbfa4decd024357702d7.tar.gz
talos-obmc-uboot-b79dadf846e5e140e261bbfa4decd024357702d7.zip
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Conflicts: README Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/LaCie')
-rw-r--r--board/LaCie/edminiv2/config.mk12
-rw-r--r--board/LaCie/edminiv2/edminiv2.c70
2 files changed, 20 insertions, 62 deletions
diff --git a/board/LaCie/edminiv2/config.mk b/board/LaCie/edminiv2/config.mk
deleted file mode 100644
index dfa84f032e..0000000000
--- a/board/LaCie/edminiv2/config.mk
+++ /dev/null
@@ -1,12 +0,0 @@
-#
-# Copyright (C) 2010 Albert ARIBAUD <albert.u.boot@aribaud.net>
-#
-# (C) Copyright 2009
-# Marvell Semiconductor <www.marvell.com>
-# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-# TEXT_BASE must equal the intended FLASH location of u-boot.
-CONFIG_SYS_TEXT_BASE = 0xfff90000
diff --git a/board/LaCie/edminiv2/edminiv2.c b/board/LaCie/edminiv2/edminiv2.c
index 80ec7faa04..edf6281797 100644
--- a/board/LaCie/edminiv2/edminiv2.c
+++ b/board/LaCie/edminiv2/edminiv2.c
@@ -12,59 +12,11 @@
#include <miiphy.h>
#include <asm/arch/orion5x.h>
#include "../common/common.h"
+#include <spl.h>
+#include <ns16550.h>
DECLARE_GLOBAL_DATA_PTR;
-/*
- * The ED Mini V2 is equipped with a Macronix MXLV400CB FLASH
- * which CFI does not properly detect, hence the LEGACY config.
- */
-#if defined(CONFIG_FLASH_CFI_LEGACY)
-#include <flash.h>
-ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
-{
- int sectsz[] = CONFIG_SYS_FLASH_SECTSZ;
- int sect;
-
- if (base != CONFIG_SYS_FLASH_BASE)
- return 0;
-
- info->size = 0;
- info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
- /* set each sector's start address and size based */
- for (sect = 0; sect < CONFIG_SYS_MAX_FLASH_SECT; sect++) {
- info->start[sect] = base+info->size;
- info->size += sectsz[sect];
- }
- /* This flash must be accessed in 8-bits mode, no buffer. */
- info->flash_id = 0x01000000;
- info->portwidth = FLASH_CFI_8BIT;
- info->chipwidth = FLASH_CFI_BY8;
- info->buffer_size = 0;
- /* timings are derived from the Macronix datasheet. */
- info->erase_blk_tout = 1000;
- info->write_tout = 10;
- info->buffer_write_tout = 300;
- /* Commands and addresses are for AMD mode 8-bit access. */
- info->vendor = CFI_CMDSET_AMD_LEGACY;
- info->cmd_reset = 0xF0;
- info->interface = FLASH_CFI_X8;
- info->legacy_unlock = 0;
- info->ext_addr = 0;
- info->addr_unlock1 = 0x00000aaa;
- info->addr_unlock2 = 0x00000555;
- /* Manufacturer Macronix, device MX29LV400CB, CFI 1.3. */
- info->manufacturer_id = 0x22;
- info->device_id = 0xBA;
- info->device_id2 = 0;
- info->cfi_version = 0x3133;
- info->cfi_offset = 0x0000;
- info->name = "MX29LV400CB";
-
- return 1;
-}
-#endif /* CONFIG_SYS_FLASH_CFI */
-
int board_init(void)
{
/* arch number of board */
@@ -83,3 +35,21 @@ void reset_phy(void)
mv_phy_88e1116_init("egiga0", 8);
}
#endif /* CONFIG_RESET_PHY_R */
+
+/*
+ * SPL serial setup and NOR boot device selection
+ */
+
+#ifdef CONFIG_SPL_BUILD
+
+void spl_board_init(void)
+{
+ preloader_console_init();
+}
+
+u32 spl_boot_device(void)
+{
+ return BOOT_DEVICE_NOR;
+}
+
+#endif /* CONFIG_SPL_BUILD */
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