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| author | Stefan Roese <sr@denx.de> | 2010-08-31 11:27:14 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-09-03 11:14:26 +0200 |
| commit | f3cac5384074f3c20b5bcbbdbccbe1e2e25ffc76 (patch) | |
| tree | 317c2164f104da0796d5018691f2b4ba104fe7ae /arch | |
| parent | c1ab75c7d4e5d080c630335b78681c50aa3569a5 (diff) | |
| download | talos-obmc-uboot-f3cac5384074f3c20b5bcbbdbccbe1e2e25ffc76.tar.gz talos-obmc-uboot-f3cac5384074f3c20b5bcbbdbccbe1e2e25ffc76.zip | |
ppc4xx: Invalidate d-cache when used as init-ram
We need to invalidate the data cache after it has been used as init-ram.
This problem was detected on the lwmon5 update.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/cpu/ppc4xx/start.S | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S index 5296dad569..4bad32f9f5 100644 --- a/arch/powerpc/cpu/ppc4xx/start.S +++ b/arch/powerpc/cpu/ppc4xx/start.S @@ -1459,6 +1459,11 @@ relocate_code: mtspr SPRN_DTV3,r6 msync isync + + /* Invalidate data cache, now no longer our stack */ + dccci 0,0 + sync + isync #endif /* CONFIG_SYS_INIT_RAM_DCACHE */ /* |
